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參數(shù)資料
| 型號： | HYB18T512800AC-37 |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 英文描述： | M39012 MIL RF CONNECTOR |
| 中文描述： | 512兆雙數(shù)據(jù)速率2內(nèi)存 |
| 文件頁數(shù)： | 83/96頁 |
| 文件大?。?/td> | 2153K |
| 代理商： | HYB18T512800AC-37 |
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HYB18T512[400/800/160]A[C/F]–[3.7/5]
512-Mbit Double-Data-Rate-Two SDRAM
Reference Loads, Setup & Hold Timing Definition and Slew Rate Derating
Data Sheet
83
Rev. 1.13, 2004-05
09112003-SDM9-IQ3P
8
Reference Loads, Setup & Hold Timing Definition and Slew Rate
Derating
8.1
Reference Load for Timing Measurements
The figure represents the timing reference load used in
defining the relevant timing parameters of the device. It
is not intended to either a precise representation of the
typical system environment nor a depiction of the actual
load presented by a production tester. System
designers should use IBIS or other simulation tools to
correlate the timing reference load to a system
environment. Manufacturers correlate to their
production test conditions, generally a coaxial
transmission line terminated at the tester electronics.
This reference load is also used for output slew rate
characterisation. The output timing reference voltage
level for single ended signals is the crosspoint with
V
TT
.
The output timing reference voltage level for differential
signals is the crosspoint of the true (e.g. DQS) and the
complement (e.g. DQS) signal.
Figure 67
Reference Load for Timing Measurements
8.2
Slewrate Measurements
8.2.1
With the reference load for timing measurements
output slew rate for falling and rising edges is measured
between
V
TT
– 250 mV and
V
TT
+ 250 mV for single
ended signals.
Output Slewrate
For differential signals (e.g. DQS / DQS) output slew
rate is measured between DQS - DQS = 500 mV and
DQS – DQS = + 500 mV. Output slew rate is verified by
design and characterisiation, but not subject to
production test.
8.2.2
Input slewrate for differential signals (CK / CK, DQS /
DQS, RDQS / RDQS) for rising edges are measured
from f.e. CK - CK = –250 mV to CK – CK = +500 mV
Input Slewrate - Differential signals
and from CK – CK = +250 mV to CK – CK = –500mV
for falling edges.
8.2.3
Input slew rate for single ended signals (other than
t
IS
,
t
IH
,
t
DS
and
t
DH
) are measured from dc-level to ac-level:
V
REF
–125 mV to
V
REF
+ 250 mV for rising edges and
Input Slewrate - Single ended signals
from
V
REF
+ 125 mV to
V
REF
– 250 mV for falling edges.
For slew rate definition of the input and data setup and
hold parameters see
Chapter 8.3
of this datasheet.
DUT
25 Ohm
V
TT
=
V
DDQ
/ 2
CK, CK
Timing Reference Points
VDDQ
DQ
DQS
DQS
RDQS
RDQS
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HYB18T512800AC-5 | M39012 MIL RF CONNECTOR |
| HYB18T512800AC | DDR2 Registered Memory Modules |
| HYB18T512800AF | DDR2 Registered Memory Modules |
| HYB18T512800AF-37 | 512-Mbit Double-Data-Rate-Two SDRAM |
| HYB18T512800AF-5 | 512-Mbit Double-Data-Rate-Two SDRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HYB18T512800AF-3S | 制造商:Qimonda 功能描述: 制造商:Infineon Technologies AG 功能描述:32M X 16 DDR DRAM, 0.45 ns, PBGA84 |
| HYB18T512800BF-2.5 | 功能描述:IC DDR2 SDRAM 512MBIT 60TFBGA RoHS:是 類別:集成電路 (IC) >> 存儲器 系列:- 標(biāo)準(zhǔn)包裝:60 系列:- 格式 - 存儲器:EEPROMs - 串行 存儲器類型:EEPROM 存儲容量:16K (2K x 8) 速度:2MHz 接口:SPI 3 線串行 電源電壓:2.5 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 封裝/外殼:8-DIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:8-PDIP 包裝:管件 產(chǎn)品目錄頁面:1449 (CN2011-ZH PDF) |
| HYB18T512800BF-3.7 | 功能描述:IC DDR2 SDRAM 512MBIT 60TFBGA RoHS:是 類別:集成電路 (IC) >> 存儲器 系列:- 標(biāo)準(zhǔn)包裝:150 系列:- 格式 - 存儲器:EEPROMs - 串行 存儲器類型:EEPROM 存儲容量:4K (2 x 256 x 8) 速度:400kHz 接口:I²C，2 線串口 電源電壓:2.5 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 封裝/外殼:8-VFDFN 裸露焊盤 供應(yīng)商設(shè)備封裝:8-DFN（2x3） 包裝:管件 產(chǎn)品目錄頁面:1445 (CN2011-ZH PDF) |
| HYB18T512800BF-3S | 功能描述:IC DDR2 SDRAM 512MBIT 60TFBGA RoHS:是 類別:集成電路 (IC) >> 存儲器 系列:- 標(biāo)準(zhǔn)包裝:2,500 系列:- 格式 - 存儲器:EEPROMs - 串行 存儲器類型:EEPROM 存儲容量:1K (128 x 8) 速度:100kHz 接口:UNI/O?（單線） 電源電壓:1.8 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 封裝/外殼:8-TSSOP，8-MSOP（0.118"，3.00mm 寬） 供應(yīng)商設(shè)備封裝:8-MSOP 包裝:帶卷 (TR) |
| HYB25D128160AT-6 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:128 Mbit Double Data Rate SDRAM |
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