參數(shù)資料
型號(hào): HY62LF16206A
廠商: Hynix Semiconductor Inc.
英文描述: 128Kx16bit full CMOS SRAM
中文描述: 128Kx16bit充分的CMOS的SRAM
文件頁(yè)數(shù): 8/11頁(yè)
文件大?。?/td> 283K
代理商: HY62LF16206A
HY62LF16206A-LT12C
DATA RETENTION ELECTRIC CHARACTERISTIC
T
A
= 0
°
C to 70
°
C
Symbol
Parameter
V
DR
Vcc for Data Retention
Rev.05 /Apr. 2002
7
Test Condition
Min.
1.2
Typ. Max.
-
Unit
V
/CS1 > Vcc - 0.2V or CS2 < Vss+0.2V
or /UB = /LB > Vcc-0.2V,
V
IN
> Vcc - 0.2V or V
IN
< Vss + 0.2V
Vcc=1.5V, /CS1 > Vcc - 0.2V,
CS2 < Vss+0.2V,
/UB = /LB > Vcc-0.2V or
V
IN
> Vcc - 0.2V or V
IN
< Vss + 0.2V
See Data Retention Timing Diagram
2.7
I
CCDR
Data Retention Current
-
-
100
uA
tCDR
Chip Deselect to Data
Retention Time
Operating Recovery Time
0
-
-
ns
tR
Notes:
1. Typical values are under the condition of T
A
= 25
°
C.
2. Typical Values are sampled and not 100% tested
3. tRC is read cycle time.
DATA RETENTION TIMING DIAGRAM 1
VCC
tRC
(3)
-
-
ns
DATA RETENTION TIMING DIAGRAM 2
/CS1
VDR
CS1>VCC-0.2V
tCDR
tR
VSS
2.3V
VIH
DATA RETENTION MODE
0.4V
VDR
tCDR
tR
VSS
VCC
2.3V
CS2
DATA RETENTION MODE
CS2<0.2V
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