參數(shù)資料
型號(hào): HTVDS84
廠商: Holtek Semiconductor Inc.
英文描述: 8-Bit High Performance Microcontroller With Macro Instruction and Voice Synthesizer and Tone Generator(高性能、8位微控制器,帶宏指令、聲話音成器和聲音發(fā)生器)
中文描述: 8位高性能微控制器,帶有宏觀指導(dǎo)和語(yǔ)音合成器和音發(fā)生器(高性能,8位微控制器,帶宏指令,聲話音成器和聲音發(fā)生器)
文件頁(yè)數(shù): 18/44頁(yè)
文件大?。?/td> 275K
代理商: HTVDS84
HTVDS84
18
June 7, 2000
The state of the register is summarized in the following table:
Register
Power On
WDT Time-out
WDT Time-out
from HALT
PC
0000H
0000H
0000H
MP0
-xxx xxxx
-uuu uuuu
-uuu uuuu
ACC
xxxx xxxx
uuuu uuuu
uuuu uuuu
TBLP
xxxx xxxx
uuuu uuuu
uuuu uuuu
TBLH
--xx xxxx
--uu uuuu
--uu uuuu
STATUS
x-00 xxxx
x-1u uuuu
x-11 uuuu
INTC
0000 0000
0000 0000
uuuu uuuu
PA
----1111
---- 1111
---- uuuu
PAC
----1111
---- 1111
---- uuuu
PB
1111 1111
1111 1111
uuuu uuuu
PBC
1111 1111
1111 1111
uuuu uuuu
TMRC
-xxx -xxx
-uuu -uuu
-uuu -uuu
SR1/2
xxxx xxxx
uuuu uuuu
uuuu uuuu
PDAL1/2
0000----
0000 ----
0000 ----
PDAH1/2
0000 0000
0000 0000
0000 0000
VOL1/2
0000----
0000 ----
0000 ----
CROM
xxxx xxxx
uuuu uuuu
uuuu uuuu
CROMC
---- --xx
---- --uu
---- --uu
Note: "u" means unchanged
"x" means unknown
Power down operation
HALT
The HALT mode is initialized by the "HALT"
instruction and results in the following:
The system oscillator is turned off
The contents of the on-chip RAM and regis-
ters remain unchanged
The WDT register is cleared
All the I/O ports maintain their original sta-
tus
The PD flag is set and the TO flag cleared
To turn off the DAs, the values are 0.
The system can quit the HALT mode by exter-
nal falling edge signal on port Aor port B. Each
bit in port A or port B can be independently se-
lected to wake up the device by mask option. Af-
ter the TO and PD flags are examined, the
reason for chip reset can be determined. The
PD flag is cleared by system power-up or exe-
cuting the CLR WDT instruction and is set
when executing the HALT instruction . The TO
flag is set if the WDT time-out occurs, and
causes a wake-up that only resets the PC and
SP; the others maintain their original status.
The port Aor port B wake-up can be considered
as a continuation of normal execution. Each bit
in port A or port B can be independently se-
lected to wake up the device by the mask op-
tion. Awakening from an I/O port stimulus, the
program will resume execution of the next in-
struction.Onceawake-upeventoccurs,ittakes
1024 tsys (system clock period) to resume nor-
mal operation. In other words, a dummy period
will be inserted after wake-up. To minimize
power consumption, all the I/O pins should be
carefully managed before entering the HALT
mode.
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