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參數(shù)資料
| 型號(hào)： | HTVDS84 |
| 廠商： | Holtek Semiconductor Inc. |
| 英文描述： | 8-Bit High Performance Microcontroller With Macro Instruction and Voice Synthesizer and Tone Generator(高性能、8位微控制器，帶宏指令、聲話音成器和聲音發(fā)生器) |
| 中文描述： | 8位高性能微控制器，帶有宏觀指導(dǎo)和語(yǔ)音合成器和音發(fā)生器（高性能，8位微控制器，帶宏指令，聲話音成器和聲音發(fā)生器） |
| 文件頁(yè)數(shù)： | 14/44頁(yè) |
| 文件大小： | 275K |
| 代理商： | HTVDS84 |
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HTVDS84
14
June 7, 2000
The general-purpose data memory (30H - 7FH)
is used for data and control formation under in-
struction commands.
All of the areas of data memory can handle
arithmetic, logic, increment, decrement and ro-
tate operations directly. Except for some dedi-
cated bits, each bit in the data memory can be
set and reset by "SET [m]." and "CLR [m].i",
and can also be indirectly accessed through a
memory pointer register (MP0; 01H).
Indirect addressing register
Location 00H is an indirect addressing register
that is not physically implemented. Any
read/write operation of R0 (00H) accesses the
data memory pointed to by MP0 (01H). Indi-
rectly reading location 00H will return the re-
sult to 00H whereas; indirectly writing it will
have no effect. The bit 7 of MP0 is undefined.
Reading it will return the result "1" and any
writing operation to MP0 will transfer only the
lower 7-bit data to MP0.
Accumulator
The accumulator is closely related to ALU oper-
ations. It is also mapped to location 05H of the
data memory and is capable of carrying out im-
mediate data operations. The data movement
between two data memory locations must pass
through the accumulator.
Arithmetic and logic unit
ALU
This circuit performs 8-bit arithmetic and logic
operations. ALU provides the following func-
tions:
Arithmetic operations (ADD, ADC, SUB,
SBC, DAA)
Logic operations (AND, OR, XOR, CPL)
Rotation (RL, RR, RLC, RRC)
Increment and decrement (INC, DEC)
Branch decision (SZ, SNZ, SIZ, SDZ ....)
The ALU not only saves the results of a data op-
erationbutcanalsochangethestatusregister.
Program counter low-order byte register
PCL
The lower byte of the program counter (PCL) is
a readable and writeable register (06H).
Moving data into PCL performs a short jump.
The destination is within 256 locations.
Table pointer and table high-order byte
TBLP & TBLH
Any location in the program ROM can be used
as a look-up table. The instructions "TABRDC
[m]" (the current page, 1 page=256 words) and
"TABRDL [m]" (the last page) transfer the con-
tents of the lower-order byte to the specified
data memory, and the higher-order byte to
TBLH (08H). Only the destination of the
lower-order byte in the table is well defined.
The other bits of the table word are transferred
to the lower portion of TBLH. The higher-order
byte register (TBLH) of the table is read only.
The table pointer (TBLP) is a read/write regis-
ter (07H) which indicates the table location.
This location must be placed in TBLPbefore ac-
cessing the table. The TBLH is read only and
cannot be restored.
Instruction
Table Location
*10
*9
*8
*7
*6
*5
*4
*3
*2
*1
*0
TABRDC [m]
P10
P9
P8
@7
@6
@5
@4
@3
@2
@1
@0
TABRDL [m]
1
1
1
@7
@6
@5
@4
@3
@2
@1
@0
Table location
Note: *10~*0: Table location bits
P10~P6: Current PC value bits
7@~ @0 : Table pointer bits
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