參數(shù)資料
型號(hào)： HT82K96A
廠商： Holtek Semiconductor Inc.
英文描述： USB Multimedia Keyboard Encoder 8-Bit Mask MCU
中文描述： 的USB多媒體鍵盤編碼器8位微控制器面膜
文件頁(yè)數(shù)： 12/46頁(yè)
文件大?。?/td> 298K
代理商： HT82K96A
HT82K96A
Rev. 1.50
12
August 25, 2006
Once the internal WDT oscillator (RC oscillator with a
period of 31 s/5V normally) is selected, it is first divided
by 256 (8-stage) to get the nominal time-out period of
8ms/5V. This time-out period may vary with tempera-
tures, VDD and process variations. By invoking the
WDT prescaler, longer time-out periods can be realized.
Writing data to WS2, WS1, WS0 (bit 2,1,0 of the WDTS)
cangivedifferenttime-outperiods.IfWS2,WS1,andWS0
are all equal to 1, the division ratio is up to 1:128, and the
maximumtime-outperiodis1s/5V.If the WDToscillator is
disabled, the WDTclock may still come from the instruc-
tion clock and operates in the same manner except that
in the HALT state the WDT may stop counting and lose
its protecting purpose. In this situation the logic can only
be restarted by external logic. The high nibble and bit 3
of the WDTS are reserved for user sdefined flags, which
can only be set to 10000 (WDTS.7~WDTS.3).
If the device operates in a noisy environment, using the
on-chip 32kHz RC oscillator (WDT OSC) is strongly rec-
ommended, since the HALT will stop the system clock.
WS2
WS1
WS0
Division Ratio
0
0
0
1:1
0
0
1
1:2
0
1
0
1:4
0
1
1
1:8
1
0
0
1:16
1
0
1
1:32
1
1
0
1:64
1
1
1
1:128
WDTS (09H) Register
The WDT overflow under normal operation will initialize
chip reset and set the status bit TO . But in the HALT
mode, the overflow will initialize a warm reset and only
the Program Counter and SP are reset to zero. To clear
the contents of WDT (including the WDT prescaler),
threemethodsareadopted;externalreset(alowlevelto
RES), software instruction and a
HALT
instruction.
The software instruction include CLR WDT and the
other set
two types of instruction, only one can be active depend-
CLR WDT1 and CLR WDT2 . Of these
ing on the ROM code option
CLR WDT times selec-
tion option . If the CLR WDT is selected (i.e. CLRWDT
times equal one), any execution of the CLR WDT in-
struction will clear the WDT. In the case that CLR WDT
and CLR WDT are chosen (i.e. CLRWDT times equal
two), these two instructions must be executed to clear
the WDT; otherwise, the WDT may reset the chip as a
result of time-out.
The time-out periods defined in WDTS can used as
wake-up period in the Mouse Hardware wake-up func-
tion. Please reference to Mouse Hardware Wake-up
function description.
Power Down Operation
HALT
The HALT mode is initialized by the HALT instruction
and results in the following...
The system oscillator will be turned off but the WDT
oscillator remains running (if the WDT oscillator is se-
lected).
The contents of the on chip RAM and registers remain
unchanged.
WDT and WDT prescaler will be cleared and re-
counted again (if the WDT clock is from the WDT os-
cillator).
All of the I/O ports maintain their original status.
The PDF flag is set and the TO flag is cleared.
The system can leave the HALT mode by means of an
external reset, an interrupt, an external falling edge sig-
nal on port A or a WDT overflow. An external reset
causes a device initialization and the WDToverflow per-
forms a warm reset . After the TO and PDF flags are
examined, the reason for chip reset can be determined.
The PDF flag is cleared by system power-up or execut-
ing the CLR WDT instruction and is set when execut-
ing the HALT instruction. The TO flag is set if the WDT
time-out occurs, and causes a wake-up that only resets
the Program Counter and SP; the others remain in their
original status.
The port A wake-up and interrupt methods can be con-
sidered as a continuation of normal execution. Each bit
in port A can be independently selected to wake up the
devicebymaskoption.AwakeningfromanI/Oportstim-
ulus, the program will resume execution of the next in-
struction. If it awakens from an interrupt, two sequence
may occur. If the related interrupt is disabled or the inter-
rupt is enabled but the stack is full, the program will re-
sume execution at the next instruction. If the interrupt is
enabled and the stack is not full, the regular interrupt re-
sponse takes place. If an interrupt request flag is set to
1 before entering the HALT mode, the wake-up func-
tion of the related interrupt will be disabled. Once a
wake-up event occurs, it takes 1024 t
SYS
(system clock
period) to resume normal operation. In other words, a
dummy period will be inserted after a wake-up. If the
wake-up results from an interrupt acknowledge signal,
the actual interrupt subroutine execution will be delayed
by one or more cycles. If the wake-up results in the next
instruction execution, this will be executed immediately
after the dummy period is finished.
To minimize power consumption, all the I/O pins should
be carefully managed before entering the HALT status.
Reset
Therearethreewaysinwhicharesetcanoccur:
RES reset during normal operation
RES reset during HALT
WDT time-out reset during normal operation
相關(guān)PDF資料
PDF描述
HT82K96E 8-Bit USB Multimedia Keyboard Encoder OTP MCU
HT82M21A 3-Key 3D USB+PS/2 Optical Mouse Controller
HT82M22 5-Key 3D USB+PS/2 Optical Mouse Controller
HT82M22A 5-Key 3D USB+PS/2 Optical Mouse Controller
HT82M23C 3/5-Key USB+PS/2 Optical Mouse Controller
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
HT82K96E 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:8-Bit USB Multimedia Keyboard Encoder OTP MCU
HT82K96E_07 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:USB Multimedia Keyboard Encoder 8-Bit OTP MCU
HT82M13 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Mouse/Trackball Controller
HT82M21A 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:3-Key 3D USB+PS/2 Optical Mouse Controller
HT82M21A_05 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:3-Key 3D USB+PS/2 Optical Mouse Controller
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*