參數(shù)資料
型號: HT82A850R
廠商: Holtek Semiconductor Inc.
英文描述: Audio MCU
中文描述: 音頻控制器
文件頁數(shù): 10/41頁
文件大?。?/td> 296K
代理商: HT82A850R
HT82A850R
Rev. 1.10
10
July 25, 2007
requests may take place during this interval, but only the
interrupt request flag will be recorded. If a certain inter-
rupt requires servicing within the service routine, the
EMI bit and the corresponding bit of INTC0 or of INTC1
may be set in order to allow interrupt nesting. Once the
stack is full, the interrupt request will not be acknowl-
edged, even if the related interrupt is enabled, until the
Stack Pointer is decremented. If immediate service is
desired, the stack should be prevented from becoming
full.
All interrupts have a wake-up capability. As an interrupt
is serviced, a control transfer occurs by pushing the pro-
gram counter onto the stack, followed by a branch to a
subroutine at a specified location in the program mem-
ory. Only the program counter is pushed onto the stack.
If the contents of the register or status register are al-
tered by the interrupt service program, which may cor-
rupt the desired control sequence, the contents should
be saved in advance.
The internal Timer/Event Counter 0 interrupt is initial-
ised by setting the Timer/Event Counter 0 interrupt re-
quest flag, bit 5 of INTC0, caused by a timer 0 overflow.
When the interrupt is enabled, the stack is not full and
the T0F bit is set, a subroutine call to location 08H will
occur. The related interrupt request flag, T0F, will be re-
setandtheEMIbitclearedtodisablefurtherinterrupts.
The internal Timer/Even Counter 1 interrupt is initialised
by setting the Timer/Event Counter 1 interrupt request
flag, bit 6 of INTC0, caused by a timer 1 overflow. When
the interrupt is enabled, the stack is not full and the T1F
is set, a subroutine call to location 0CH will occur. The
related interrupt request flag, T1F, will be reset and the
EMI bit cleared to disable further interrupts.
The play interrupt is initialised by setting the play inter-
rupt request flag, bit 4 of INTC1, caused by a valid play
interrupt. When the interrupt is enabled, the stack is not
full and PLAYF is set, a subroutine call to location 10H
will occur. The related interrupt request flag, PLAYF, will
be reset and the EMI bit cleared to disable further inter-
rupts. If PLAY_MODE, bit 3 of the MODE_CTRL regis-
ter, is set to 1 , the play interrupt frequency will change
to 8kHz, otherwise the interrupt frequency is 48 kHz.
The firmware will write 16-bit unsigned data to the DAC
when a play interrupt occurs.
The serial interface interrupt is indicated by the interrupt
flag, SIF; bit 5 of INTC1, that is generated by the recep-
tion or transfer of a complete 8-bits of data between the
HT82A850R and the external device. The serial inter-
face interrupt is controlled by setting the Serial interface
interrupt control bit, ESII; bit 1 of INTC1. After the inter-
rupt is enabled, by setting SBEN; bit 4 of SBCR, and the
stack is not full and the SIF bit is set, a subroutine call to
location 14H occurs.
The record interrupt is initialised by setting the record in-
terrupt request flag, bit 6 of INTC1, caused by a record
datavalid.Whentheinterruptisenabled,thestackisnot
full and RECF is set, a subroutine call to location 18H
will occur. The related interrupt request flag, RECF, will
be reset and the EMI bit cleared to disable further inter-
rupts. If the ADC is powered down, AD_ENB =1, the re-
cord interrupt will be disabled.
Bit No.
Label
Function
0
EMI
Controls the master (global) interrupt (1=enabled; 0=disabled)
1, 4, 7
Unused bit, read as 0
2
ET0I
Controls the Timer/Event Counter 0 interrupt (1=enabled; 0=disabled)
3
ET1I
Controls the Timer/Event Counter 1 interrupt (1=enabled; 0=disabled)
5
T0F
Internal Timer/Event Counter 0 request flag (1=active; 0=inactive)
6
T1F
Internal Timer/Event Counter 1 request flag (1=active; 0=inactive)
INTC 0 (0BH) Register
Bit No.
Label
Function
0
EPLAYI
Play interrupt (1= enabled; 0= disabled)
1
ESII
Control Serial interface interrupt (1= enabled; 0= disabled)
2
ERECI
Record interrupt (1= enabled; 0= disabled)
3, 7
Unused bit, read as 0
4
PLAYF
Play interrupt request flag (1= active; 0= inactive)
5
SIF
Serial interface interrupt request flag (1= active; 0= inactive)
6
RECF
Record interrupt request flag (1= active; 0= inactive)
INTC 1 (1EH) Register
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