參數(shù)資料
型號(hào)： HT48C50-
廠商： Holtek Semiconductor Inc.
元件分類： 數(shù)學(xué)處理器
英文描述： 8-BIT MICROCONTROLLER
中文描述： 8位微控制器
文件頁(yè)數(shù)： 18/45頁(yè)
文件大小： 295K
代理商： HT48C50-
HT48C50-1
18
June 14, 2000
Preliminary
Timer/event counter
Two timer/event counters (TMR0, TMR1) are
implemented in the microcontroller. The
timer/event counter 0 contains an 8-bit pro-
grammable count-up counter and the clock may
comefromanexternalsourceorfromthesystem
clock or RTC.
The timer/event counter 1 contains an 16-bit
programmable count-up counter and the clock
may come from an external source or from the
system clock divided by 4 or RTC.
Using the internal clock sources, there are 2
reference time-bases for timer/event counter 0.
The internal clock source can be selected as
coming from f
SYS
(can always be optioned) or
f
RTC
(enabled only system oscillator in the Int.
RC+RTC mode) by mask option. The external
clock input allows the user to count external
events, measure time intervals or pulse widths,
Label (TMR0C)
Bits
Function
PSC0~PSC2
0~2
To define the prescaler stages, PSC2, PSC1, PSC0=
000: f
INT
=f
SYS
/2 or f
RTC
/2
001: f
INT
=f
SYS
/4 or f
RTC
/4
010: f
INT
=f
SYS
/8 or f
RTC
/8
011: f
INT
=f
SYS
/16 or f
RTC
/16
100: f
INT
=f
SYS
/32 or f
RTC
/32
101: f
INT
=f
SYS
/64 or f
RTC
/64
110: f
INT
=f
SYS
/128 or f
RTC
/128
111: f
INT
=f
SYS
/256 or f
RTC
/256
To define the TMR0 active edge of timer/event counter 0
(0=active on low to high; 1=active on high to low)
TE
3
TON
4
To enable/disable timer 0 counting
(0=disabled; 1=enabled)
5
Unused bit, read as"0"
TM0
TM1
6
7
To define the operating mode
01=Event count mode (external clock)
10=Timer mode (internal clock)
11=Pulse width measurement mode
00=Unused
TMR0C register
* ,
# ' ! )
!
' * !
#@ ! * !*
' * #!
# !
!*
!* /
'
@
! *! !
/ 0
/ 0
4 ; ! * "
4 ; *
-
= * " ! #
Timer/event counter 0
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