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| 型號： | HT48C10-1 |
| 廠商： | Holtek Semiconductor Inc. |
| 英文描述： | 8-Bit High Performance RISC-like Microcontroller Suitable for Multiple I/O Application(高性能、指令類似RISC的8位微控制器，用于多I/O接口設(shè)備) |
| 中文描述： | 8位高性能RISC架構(gòu)微控制器等的多個(gè)I / O應(yīng)用（高性能，指令類似的RISC的8位微控制器，用于多予適用/輸出接口設(shè)備） |
| 文件頁數(shù)： | 9/43頁 |
| 文件大?。?/td> | 274K |
| 代理商： | HT48C10-1 |
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HT48C10-1
9
January 4, 2001
Instruction
Table Location
*9
*8
*7
*6
*5
*4
*3
*2
*1
*0
TABRDC [m]
P9
P8
@7
@6
@5
@4
@3
@2
@1
@0
TABRDL [m]
1
1
@7
@6
@5
@4
@3
@2
@1
@0
Table location
Note: *9~*0: Table location bits
P9, P8: Current program counter bits
@7~@0: Table pointer bits
Stack register
STACK
This is a special part of the memory which is
used to save the contents of the program coun-
ter (PC) only. The stack is organized into 4 lev-
els and is neither part of the data nor part of the
program space, and is neither readable nor
writable. The activated level is indexed by the
stack pointer (SP) and is neither readable nor
writeable. At a subroutine call or interrupt ac-
knowledgment, the contents of the program
counter are pushed onto the stack. At the end of
a subroutine or an interrupt routine, signaled
by a return instruction (RET or RETI), the pro-
gram counter is restored to its previous value
from the stack. After a chip reset, the SP will
point to the top of the stack.
If the stack is full and a non-masked interrupt
takes place, the interrupt request flag will be
recorded but the acknowledgment will be inhib-
ited. When the stack pointer is decremented (by
RET or RETI), the interrupt will be serviced.
This feature prevents stack overflow allowing
the programmer to use the structure more eas-
ily. In a similar case, if the stack is full and a
"CALL" is subsequently executed, stack over-
flow occurs and the first entry will be lost (only
themostrecent4returnaddressesarestored).
Data memory
RAM
The data memory is designed with 81 8 bits.
The data memory is divided into two func-
tional groups: special function registers and
general purpose data memory (64 8). Most are
read/write, but some are read only.
The special function registers include the indi-
rect addressing register (00H), timer/event
counter (TMR;0DH), timer/event counter con-
trol register (TMRC;0EH), program counter
lower-order byte register (PCL;06H), memory
pointer register (MP;01H), accumulator
(ACC;05H), table pointer (TBLP;07H), table
higher-order byte register (TBLH;08H), status
register (STATUS;0AH), interrupt control reg-
ister (INTC;0BH), Watchdog Timer option set-
ting register (WDTS;09H), I/O registers
(PA;12H, PB;14H, PC;16H) and I/O control
registers (PAC;13H, PBC;15H, PCC;17H). The
remaining space before the 40H is reserved for
future expanded usage and reading these loca-
tions will get "00H". The general purpose data
memory, addressed from 40H to 7FH, is used
for data and control information under in-
struction commands.
All of the data memory areas can handle arith-
metic, logic, increment, decrement and rotate
operations directly. Except for some dedicated
bits, each bit in the data memory can be set and
reset by "SET [m].i" and "CLR [m].i". They are
also indirectly accessible through memory
pointer register (MP;01H).
Indirect addressing register
Location 00H is an indirect addressing register
that is not physically implemented. Any
read/writeoperationof[00H]accessesdatamem-
orypointedtobyMP(01H).Readinglocation00H
itself indirectly will return the result 00H. Writ-
ing indirectly results in no operation.
The memory pointer register MP (01H) is a 7-bit
register. The bit 7 of MP is undefined and reading
willreturntheresult 1 .Anywritingoperationto
MPwillonlytransferthelower7-bitdatatoMP.
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| HT48C10-1(24SKDIP) | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:MICROCONTROLLER|8-BIT|CMOS|DIP|24PIN|PLASTIC |
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