參數(shù)資料
型號(hào): HT48C10-1
廠商: Holtek Semiconductor Inc.
英文描述: 8-Bit High Performance RISC-like Microcontroller Suitable for Multiple I/O Application(高性能、指令類似RISC的8位微控制器,用于多I/O接口設(shè)備)
中文描述: 8位高性能RISC架構(gòu)微控制器等的多個(gè)I / O應(yīng)用(高性能,指令類似的RISC的8位微控制器,用于多予適用/輸出接口設(shè)備)
文件頁數(shù): 17/43頁
文件大?。?/td> 274K
代理商: HT48C10-1
HT48C10-1
17
January 4, 2001
Timer/event counter
A timer/event counter (TMR) is implemented in
the microcontroller. The timer/event counter
contains an 8-bit programmable count-up coun-
ter and the clock may come from an external
source or the system clock.
Using the internal system clock, there is only
one reference time-base. The internal clock
source comes from f
SYS
. The external clock in-
put allows the user to count external events,
measure time intervals or pulse widths, or to
generate an accurate time base.
There are 2 registers related to the timer/event
counter;TMR([0DH]),TMRC([0EH]).Twophys-
ical registers are mapped to TMR location; writ-
ing TMR makes the starting value be placed in
the timer/event counter preload register and
reading TMR gets the contents of the timer/event
counter. The TMRC is a timer/event counter con-
trol register, which defines some options.
Label (TMRC)
Bits
Function
PSC0~PSC2
0~2
To define the prescaler stages, PSC2, PSC1, PSC0=
000: f
INT
=f
SYS
/2
001: f
INT
=f
SYS
/4
010: f
INT
=f
SYS
/8
011: f
INT
=f
SYS
/16
100: f
INT
=f
SYS
/32
101: f
INT
=f
SYS
/64
110: f
INT
=f
SYS
/128
111: f
INT
=f
SYS
/256
To define the TMR active edge of timer/event counter
(0=active on low to high; 1=active on high to low)
TE
3
TON
4
To enable/disable timer counting
(0=disabled; 1=enabled)
5
Unused bits, read as"0"
TM0
TM1
6
7
To define the operating mode
01=Event count mode (external clock)
10=Timer mode (internal clock)
11=Pulse width measurement mode
00=Unused
TMRC register
- ( % $ "
$ ' % - # $ , $ . /
* 3 $ * . / # * (
1 3 / 4
1 , $ #@ $ . /* - . / $ #
# $ ( * ' 3 $ + 1 % / $ #
1 , $ #$ @ $ . /
* - . / $ #
' / '- %
$ ( * ' 3
@ $ # ) ( * B
/ * / $ # # - 0 /
; % / ' + $ 0 # $ % & ' ( $ #
;
)
)
Timer/event counter
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