參數(shù)資料
型號(hào): HT48C10-1
廠商: Holtek Semiconductor Inc.
英文描述: 8-Bit High Performance RISC-like Microcontroller Suitable for Multiple I/O Application(高性能、指令類似RISC的8位微控制器,用于多I/O接口設(shè)備)
中文描述: 8位高性能RISC架構(gòu)微控制器等的多個(gè)I / O應(yīng)用(高性能,指令類似的RISC的8位微控制器,用于多予適用/輸出接口設(shè)備)
文件頁(yè)數(shù): 19/43頁(yè)
文件大?。?/td> 274K
代理商: HT48C10-1
HT48C10-1
19
January 4, 2001
put/outputlatchescanbesetorclearedby"SET
[m].i" and "CLR [m].i" (m=12H, 14H or 16H) in-
structions.
Some instructions first input data and then fol-
low the output operations. For example, "SET
[m].i", "CLR [m].i", "CPL [m]", "CPLA[m]" read
the entire port states into the CPU, execute the
defined operations (bit-operation), and then
write the results back to the latches or the accu-
mulator.
Each line of port A has the capability of wak-
ing-up the device. The highest 3-bit of port C are
not physically implemented; on reading them a
"0" is returned whereas writing then results in a
no-operation. See Application note.
There is a pull-high option available for all I/O
ports (byte option). Once the pull-high option of
an I/O port is selected, all I/O lines have
pull-high resistors. Otherwise, the pull-high re-
sistors are absent. It should be noted that a
non-pull-high I/O line operating in input mode
will cause a floating state.
The PB0 and PB1 are pin-shared with BZ and
BZ signal, respectively. If the BZ/BZ option is
selected, the output signal in output mode of
PB0/PB1 will be the PFD signal generated by
timer/event counter overflow signal. The input
mode always remaining its original functions.
Once the BZ/BZ option is selected, the buzzer
output signals are controlled by PB0 data regis-
ter only. The I/O functions of PB0/PB1 are
shown below.
PB0 I/O
I
I
I
I
O
O
O
O
O
O
O
O
PB1 I/O
I
O
O
O
I
I
I
O
O
O
O
O
PB0 Mode
x
x
x
x
C
B
B
C
B
B
B
B
PB1 Mode
x
C
B
B
x
x
x
C
C
C
B
B
PB0 Data
x
x
0
1
D
0
1
D
0
0
1
0
1
PB1 Data
x
D
x
x
x
x
x
D
1
D
D
x
x
PB0 Pad Status
I
I
I
I
D
0
B
D
0
0
B
0
B
PB1 Pad Status
I
D
0
B
I
I
I
D
1
D
D
0
B
Note: I input,
B buzzer option, BZ or BZ,
C CMOS output
O output,
D, D
0
, D
1
data,
x don't care
The PC0 and PC1 are pin-shared with INT,
TMR and pins respectively.
In case of Internal RC+I/O system oscillator,
the PC3 and PC4 are pin-shared with OSC1
and OSC2 pins. Once the Internal RC+I/O
mode is selected, the PC3 and PC4 can be used
as general purpose I/O lines. Otherwise, the
pull-highresistorsandI/OfunctionsofPC3and
PC4 will be disabled.
It is recommended that unused or not bonded
out I/O lines should be set as output pins by
software instruction to avoid consuming power
under input floating state.
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