參數(shù)資料
型號(hào): HT46C64
廠商: Holtek Semiconductor Inc.
英文描述: A/D with LCD Type 8-Bit MCU
中文描述: 在A / D液晶型8位微控制器
文件頁(yè)數(shù): 28/47頁(yè)
文件大?。?/td> 345K
代理商: HT46C64
HT46R64/HT46C64
Rev. 1.40
28
September 21, 2004
Options
Time Base time-out period selection.
The Time Base time-out period ranges from 2
12
/f
S
to 2
15
/f
S
f
S
means the clock source selected by options.
Buzzer output frequency selection.
There are eight types of frequency signals for buzzer output: f
S
/2
2
~f
S
/2
9
. f
S
means the clock source selected by op-
tions.
Wake-up selection.
This option defines the wake-up capability. External I/O pins (PA only) all have the capability to wake-up the chip
from a HALT by a falling edge (bit option).
Pull-high selection.
This option is to decide whether the pull-high resistance is visible or not in the input mode of the I/O ports. PA, PB and
PD can be independently selected (bit option).
I/O pins share with other function selections.
PA0/BZ, PA1/BZ: PA0 and PA1 can be set as I/O pins or buzzer outputs.
LCD common selection.
There are three types of selections: 2 common (1/2 duty) or 3 common (1/3 duty) or 4 common (1/4 duty). If the 4
common is selected, the segment output pin SEG40 will be set as a common output.
LCD bias power supply selection.
There are two types of selections: 1/2 bias or 1/3 bias
LCD bias type selection.
This option is to determine what kind of bias is selected, R type or C type.
LCD driver clock frequency selection.
ThereareseventypesoffrequencysignalsfortheLCDdrivercircuits:f
S
/2
2
~f
S
/2
8
. f
S
standsfortheclocksourcese-
lection by options.
LCD ON/OFF at HALT selection
LCD Segments as logical output selection, (byte, bit, bit, bit, bit, bit, bit, bit, bit option)
[SEG0~SEG7], SEG8, SEG9, SEG10, SEG11, SEG12, SEG13, SEG14 or SEG15
LVR selection.
LVR has enable or disable options
LVD selection.
LVD has enable or disable options
PFD selection.
If PA3 is set as PFD output, there are two types of selections; One is PFD0 as the PFD output, the other is PFD1 as
the PFD output. PFD0, PFD1 are the timer overflow signals of the Timer/Event Counter 0, Timer/Event Counter 1 re-
spectively.
PWM selection: (7+1) or (6+2) mode
PD0: level output or PWM0 output
PD1: level output or PWM1 output
PD2: level output or PWM2 output
PD3: level output or PWM3 output
INT0 or INT1 trigger edge selection: disable; high to low; low to high; low to high or high to low
LCD bias current selection: low/high driving current (for R type only).
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