參數(shù)資料
型號: HSP50215
廠商: Intersil Corporation
英文描述: Digital UpConverter(數(shù)字上變頻器)
中文描述: 數(shù)字上變頻器(數(shù)字上變頻器)
文件頁數(shù): 10/21頁
文件大?。?/td> 162K
代理商: HSP50215
3-10
Carrier NCO
The Carrier NCO provides the quadrature local oscillator
references for the Vector Modulator/Mixer. The Carrier NCO
input carrier frequency control word has 32 bits of resolution.
The block diagram is shown in Figure 10.
The carrier frequency is a single buffered 32-bit frequency
control, loaded 16 bits at a time into Control Words 4 and 5.
Since the DUC requires two loads, there is a possibility of a
phase glitch.
The Carrier NCO is disabled during a RST assertion or a
reset caused by writing to CW21. The Carrier NCO stays
disabled until a sync assertion is detected independent of
the initiating sync source (SYNCIN or WR CW3). The Carrier
NCO is also disabled by programming a zero in Control
Word 16 bit 3. This bit freezes the NCO and also disables
the output of the modulator.
To avoid the phase glitch, noted above, the phase
accumulator can be disabled at reset, and the frequency can
be pre-loaded prior to asserting sync.
The maximum error is 52MHz/(2
32
) = 0.012Hz for the
commercial part and 0.011Hz for the industrial part. The
carrier frequency can be calculated from the value loaded
into Control Address 4 and 5 by:
where CR(31:0) is the 32-bit frequency control word which can
range from -2
31
to ~2
31
for a NCO output range of -f
CLK
/2 to
~
f
CLK
/2. f
CLK
is the REFCLK frequency.
This NCO frequency range allows for spectral inversion.
Given a desired carrier frequency, the value for CR(31:0)
loaded into the part can be calculated by:
where INT[X] is the integer part of the real number X.
The most significant 18 bits of the 32-bit phase word from
the Carrier NCO drives a Sin/Cos generator. Eighteen bit
resolution is supplied on the sinusoid outputs.
Assertion of RST stops the Carrier NCO and clears the
accumulator contents. It is held disabled until a SYNCIN or
write to Control Word 3 generates an EnNCO signal to
restart the NCO.
Vector Modulator/Mixer
The frequency resolution of the vector modulator is 32 bits.
The conceptual block diagram of the Vector Modulator/Mixer
is shown in Figure 11. The modulator operates at maximum
frequency of 52MHz (commercial). The mixer takes the
sin/cos terms generated by the carrier NCO sin/cos
generator and mixes it with the input data lines I and Q. The
resulting output is given by
NOTE: There is no overflow protection provided at the output of
the modulator summer, so care must be taken to ensure
that the input signals are scaled prior to input to prevent
overflow.
The mixers can be bypassed by programming Control Words
4 and 5 to zero, which sets COS = 1 and SIN = 0.
FIGURE 10. CARRIER NCO BLOCK DIAGRAM
32
SYNCIN
WR CW3
CARRIER
FREQUENCY
SIN/COS
GEN
SYNCSEL
ALL REGISTERS ARE
CLOCKED AT REFLCK
EN OUT
18
18
TO
MODULATOR
OUTPUT
SIN COS
WR CW21
RST
RESET
EDGE
GEN
START
EDGE
GEN
R
E
G
>
R
E
G
>
R
E
G
>
R
E
G
>
R
E
G
>
EnNCO
ACC
REG
>
32
0
M
F
CARRIER
CR 31:0
)
f
CLK
2
32
×
×
=
(EQ. 7)
CR 31:0
)
INT F
C
f
CLK
*2
32
]
=
(EQ. 8)
Output
I * cos
Q * sin
=
(EQ. 9)
FIGURE 11. VECTOR MODULATOR/MIXER BLOCK DIAGRAM
16
I(15:0)
SIN
16
Q(15:0)
COS
16
EN OUT
MOD(15:0)
18
18
+
-
HSP50215
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