參數(shù)資料
型號: HS-6617RH
廠商: Intersil Corporation
英文描述: Radiation Hardened 2K x 8 CMOS PROM
中文描述: 輻射加固2K × 8的CMOS胎膜早破
文件頁數(shù): 9/14頁
文件大小: 128K
代理商: HS-6617RH
9
Burn-In Circuits
HS-6617RH 24 LEAD SBDIP AND FLATPACK
STATIC CONFIGURATION
NOTES:
1. VDD = 6.0V
±
0.5V
2. C1 = 0.01
μ
F (Min)
3. All Resistors = 47k
±
5%
4. Y = 2.7V
±
10%
HS-6617RH 24 LEAD SBDIP AND FLATPACK
DYNAMIC CONFIGURATION
NOTES:
1. VDD = 6.0V
±
0.5V
2. VIH = 4.5V
±
10%
3. VIL = 0.8V (Max)
4. C1 = 0.01
μ
F (Min)
5. All Resistors = 47k
±
5%
6. F0 = 100KHz
±
10%, 40 - 60% duty cycle
7. F1 = F0/2 . . . F13 = F12/2
8. Y = 2.7V
±
10%
Irradiation Circuit
HS-6617RH 24 LEAD FLATPACK
NOTES:
1. Power Supply: VDD = 5.5V
2. All Registors = 47K
3. Pin 18 is toggled from VSS to VDD then back to VSS and held at VSS during irradiation.
A7
A6
A5
A4
A3
A2
A1
A0
Q0
Q1
Q2
GND
VDD
A8
Q3
A9
A10
Q7
Q6
Q5
Q4
E
G
P
VDD
C1
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
Y
Y
A7
A6
A5
A4
A3
A2
A1
A0
Q0
Q1
Q2
GND
VDD
A8
Q3
A9
A10
Q7
Q6
Q5
Q4
E
G
P
F9
C1
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
VDD
F11
F12
VDD
F1
F13
F0
F10
F8
F7
F6
F5
F4
F3
Y
Y
LOAD =
VDD
VSS
47K
47K
16
17
18
19
20
21
22
23
24
15
14
13
LOAD
LOAD
LOAD
LOAD
LOAD
1
2
3
4
5
6
7
8
9
10
11
12
VDD
LOAD
LOAD
LOAD
NC
NC
NC
TOGGLE (NOTE 3)
HS-6617RH
Spec Number
518742
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