參數(shù)資料
型號(hào): HS-6617RH
廠商: Intersil Corporation
英文描述: Radiation Hardened 2K x 8 CMOS PROM
中文描述: 輻射加固2K × 8的CMOS胎膜早破
文件頁數(shù): 3/14頁
文件大?。?/td> 128K
代理商: HS-6617RH
3
Specifications HS-6617RH
Absolute Maximum Ratings
Reliability Information
Supply Voltage ( All Voltages Reference to Device GND) . . . .+7.0V
Input or Output Voltage
Applied for All Grades. . . . . . . . . . . . . . . . . GND-0.3V to VDD+0.3V
Storage Temperature Range . . . . . . . . . . . . . . . . . -65
o
C to +150
o
C
Junction Temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175
o
C
Lead Temperature (Soldering 10s). . . . . . . . . . . . . . . . . . . . +300
o
C
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Thermal Resistance
Sidebraze DIP Package . . . . . . . . . . . . .
Ceramic Flatpack Package . . . . . . . . . . .
Maximum Package Power Dissipation at +125
o
C
Sidebraze DIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . 1.251W
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . . . 0.83W
If device power exceeds package dissipation capability, provide heat
sinking or derate linearly at the following rate:
Sidebraze DIP Package . . . . . . . . . . . . . . . . . . . . . . . .25.0mW/C
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . .16.7mW/C
θ
JA
θ
JC
6
o
C/W
4
o
C/W
40
o
C/W
60
o
C/W
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Operating Conditions
Operating Supply Voltage Range (VDD) . . . . . . . . . +4.5V to +5.5V
Operating Temperature Range (T
A
) . . . . . . . . . . . . -55
o
C to +125
o
C
Input Low Voltage (VIL). . . . . . . . . . . . . . . . . . . . . . . . . .0V to +0.8V
Input High Voltage (VIH) . . . . . . . . . . . . . . . . . . . . . . . +2.4V to VDD
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
Device Guaranteed and 100% Tested.
PARAMETER
SYMBOL
(NOTES 1, 2)
CONDITIONS
GROUP A
SUBGROUPS
TEMPERATURE
LIMITS
UNITS
MIN
MAX
High Level Output
Voltage
VOH1
VDD = 4.5V, IO = -2.0mA
1, 2, 3
-55
o
C
T
A
+125
o
C
2.4
-
V
Low Level Output
Voltage
VOL
VDD = 4.5V, IO = 4.8mA
1, 2, 3
-55
o
C
T
A
+125
o
C
-
0.4
V
High Impedance Output
Leakage Current
IOZ
VDD = 5.5V, G = 5.5V,
VI/O = GND or VDD
1, 2, 3
-55
o
C
T
A
+125
o
C
-10.0
10.0
μ
A
Input Leakage Current
II
VDD = 5.5V, VI = GND or
VDD, P Not Tested
1, 2, 3
-55
o
C
T
A
+125
o
C
-1.0
1.0
μ
A
Standby Supply Current
IDDSB
VDD = 5.5V, IO = 0mA,
VI = VDD or GND
1, 2, 3
-55
o
C
T
A
+125
o
C
-
200
μ
A
Operating Supply
Current
IDDOP
VDD = 5.5V, G = GND,
(Note 3), f = 1MHz,
IO = 0mA, VI = VDD or GND
1, 2, 3
-55
o
C
T
A
+125
o
C
-
25
mA
Functional Test
FT
VDD = 4.5V (Note 4)
7, 8A, 8B
-55
o
C
T
A
+125
o
C
-
-
-
NOTES:
1. All voltages referenced to device GND.
2. All tests performed with P hardwired to VDD.
3. Typical derating = 20mA/MHz increase in IDDOP.
4. Tested as follows: f = 1MHz, VIH = 2.4V, VIL = 0.8V, IOH = -1mA, IOL = +1mA, VOH
1.5V, VOL
1.5V.
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
Device Guaranteed and 100% Tested.
PARAMETERS
SYMBOL
(NOTES 1, 2, 3)
CONDITIONS
GROUP A
SUBGROUPS
TEMPERATURE
LIMITS
UNITS
MIN
MAX
Address Access Time
TAVQV
VDD = 4.5V and 5.5V
(Note 4)
9, 10, 11
-55
o
C
T
A
+125
o
C
-
120
ns
Output Enable Access Time
TGLQV
VDD = 4.5V and 5.5V
9, 10, 11
-55
o
C
T
A
+125
o
C
-
50
ns
Chip Enable Access Time
TELQV
VDD = 4.5V and 5.5V
9, 10, 11
-55
o
C
T
A
+125
o
C
-
100
ns
Address Setup Time
TAVEL
VDD = 4.5V and 5.5V
9, 10, 11
-55
o
C
T
A
+125
o
C
20
-
ns
Spec Number
518742
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