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| 型號： | HMS97C7134 |
| 英文描述： | [Monitor] |
| 中文描述： | [顯示器] |
| 文件頁數(shù)： | 6/86頁 |
| 文件大?。?/td> | 1508K |
| 代理商： | HMS97C7134 |
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HMS91C7134
6
November.2001 ver1.0
5. PIN FUNCTION
V
DD1
: Supply voltage (Digital).
V
SS1
: Circuit ground (Digital).
V
DD2
: Supply voltage (Analog).
V
SS2
: Circuit ground (Analog).
RESET
: Reset the MCU.
XTAL1
: Input to the inverting oscillator amplifier and input to
the internal main clock operating circuit.
XTAL2
: Output from the inverting oscillator amplifier.
HSYNC
IN
: Horizontal sync input
VSYNC
IN
: Vertical sync input
INT0/V
PP
: External Interrupt input. Programming supply volt-
age(during OTP programming)
PORT:
The HMS9xC7134 has four 8-bit ports (Port0, Port1, Port2,
and Port3). Port0 - Port3 are the same as in the 80C51, with
the exception of the additional functions of Port1, Port2 and
Port3. Each has latch, SFR P0~P3’ output driver and input
buffer.
P0.0~P0.7
: P0 is an 8-bit CMOS bidirectional I/O port. P0 pins
have not pull-up resister and open-drain port. It has the capability
of drive LED. However, while the alternative function is per-
formed, the port type will remain the same. In case of application
to extention of external memory, P0 outputted Write/Read byte
and lower byte of external memory address. Therefore when it is
used as normal I/O port, P0 is open-drain driver and when it used
as bus port, P0 is 3-state driver.
P1.0~P1.7
: P1 is an 8-bit CMOS bidirectional I/O port. Because
P1 pins have pull-up resister, it is called as Quasi-Bidirectional
port.
P2.0~P2.7
: P2 is an 8-bit CMOS bidirectional I/O port. Because
P2 pins have pull-up resister, it is called as Quasi-Bidirectional
port. .
P3.0~P3.7
: P3 is an 8-bit CMOS bidirectional I/O port. Because
P3 pins have pull-up resister, it is called as Quasi-Bidirectional
port.
Port pin
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
Alternate function
No (Only for I/O function)
No (Only for I/O function)
No (Only for I/O function)
No (Only for I/O function)
No (Only for I/O function)
No (Only for I/O function)
No (Only for I/O function)
No (Only for I/O function)
Port pin
Alternate function
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
SCL1 (DDC-SCL)
SDA1 (DDC-SDA)
ACH0
ACH1
ACH2
ACH3
SCL2 (I
2
C-SCL)
SDA2 (I
2
C-SDA)
Port pin
P2.0
P2.1
P2.2
P2.3
P2.4
P2.5
P2.6
P2.7
Alternate function
DPWM0*
DPWM1*
PWM0*
PWM1*
PWM2*
PWM3*
PWM4*
PWM5*
Port pin
Alternate function
P3.0
P3.1
P3.2
P3.3
P3.4
P3.5
P3.6
P3.7
Reserved
Reserved
HSYNC
OUT
VSYNC
OUT
PWM6*
CLAMP/PWM7
PATOUT
SOG
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