參數(shù)資料
型號(hào)： HMS97C7134
英文描述： [Monitor]
中文描述： [顯示器]
文件頁數(shù)： 54/86頁
文件大?。?/td> 1508K
代理商： HMS97C7134
HMS91C7134
54
November.2001 ver1.0
17.2 Programmer’s Guide for I2C and DDC2
The I2C serial I/O and DDC Interface has operates in 4 modes.
Master transmitter
Master receiver
Slave transmitter
Slave receiver
17.2.1 Master transmitter mode
Slave transmitter mode
1. Read SxSTA.
2. If BBUSY == 1 then
go to step1.
Else then
write slave address to SxDAT and set both ENI and STA, reset AA in SxCON.
3. Wait for interrupt.
4. Read SxSTA.
If BLOST == 1 or /ACK_REP == 1* then
write dummy data to SxDAT.
Go to step1.
Else then
clear STA.
5. Perform required service routines.
If this datum == LAST then
set STO in SxCON and write last data to SxDAT**.
Go to step 6.
Else then
write next data to SxDAT**.
Go to step3.
6. Wait for interrupt.
Write dummy data to SxDAT**.
* : 1. If the master don’t receive the acknowledge from the slave, it generates the STOP condition and returns to the IDLE state.
**: 1. This action should be the last in service routine.
1. Write slave address to SxADR, set AA and ENI in SxCON.
2. Wait for interrupt.
3. Read SxSTA and write the first data to SxDAT*. Reset AA in SxCON.
5. Wait for interrupt.
6. Read SxSTA.
If /ACK_REP == 1** then
Go to step7.
Else then
write the next SxDAT*.
Go to step5.
7. Write dummy data to SxDAT*.
* : 1. These actions should be the last.
**: 1. If the master want to stop the current data requests, it don’t have to acknowledge to the slave transmitter.
2. If the slave don’t receive the acknowledge from the master, it releases the SDA and enters the IDLE state,
so if the master is to resume the data requests, it must regenerate the START condition.
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