- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄384421 > HIP2500 (Intersil Corporation) () PDF資料下載
參數(shù)資料
| 型號： | HIP2500 |
| 廠商： | Intersil Corporation |
| 英文描述： | () |
| 中文描述： | （） |
| 文件頁數(shù)： | 4/8頁 |
| 文件大?。?/td> | 81K |
| 代理商： | HIP2500 |
4-4
because the higher the gate voltage is the longer it takes to
turn off the device. Also more charge must be transferred,
which dissipates more power both in the HIP2500 and in the
switch device. Finally, by increasing the time required to turn
off the power MOS device, one increases the risk of “shoot-
through”. For all of the above reasons it is wise not to over-
charge the gate of the power device.
Under-Voltage Requirements
The designer must pay attention to how low the Bias Supply
voltage can go before causing the forward voltage drop of
the power switch to increase dangerously. Generally, this
voltage will be about 8V or less. The HIP2500 provides und-
ervoltage protection at typically 9V, although the minimum
trip value can be as low as 7.7V.
To reset the undervoltage circuit requires that the supply
voltage exceed the trip level by at least 0.25V (the hysteresis
of the U/V circuit). To again turn on a switch, a new edge sig-
nal must be generated by issuing a new high input on the
desired input (HIN/LIN).
Lower Bias Supply Design
The lower bias supply design is simple, but must be clean
and have low series resistance and inductance between the
source and the V
CC
terminals. Also the common from the
supply source to the COM terminal on the IC should be short
and of low impedance. Usually it is sufficient to put a low
ESR capacitor of a few microfarads directly from V
CC
to
COM. In any event, this capacitor must have sufficient
charge to dump into the bootstrap capacitor whenever the
VS (phase) terminal moves toward COM. This happens
when the lower switch is on and usually whenever the upper
switch has just been turned off. This will be explained in
more detail under Bootstrap Circuit Design.
Another point to remember is that the voltage remaining on
the bypass capacitor after dumping to the bootstrap capaci-
tor should not cause the voltage on the bypass capacitor to
drop below the Maximum undervoltage trip level. This level
can be as high as 9.99V. Of course this assumes no current
will come from the external bias supply during the refresh
time. In practice, your supply will probably not be this soft
and a good rule of thumb is to choose a bypass capacitor
about 10 times larger than the bootstrap capacitance.
Bootstrap Circuit Design
The upper bias is maintained by the Bootstrap Capacitor
between refresh cycles. A refresh cycle is defined as the time
which elapses between conduction periods of the lower power
switch and/or its body diode or flyback diode. Sometimes
compromises on the size of the bootstrap capacitor must be
made. For example, the capacitor should not be so large as to
require an excessively long refresh period. Nor should it be so
small that the voltage droops below the undervoltage trip point
during the upper switch conduction period.
The largest factor in the amount of droop for frequencies
above several kHz is the magnitude of charge required to
charge the gate input capacitance of the driven switch to its
final voltage. The charge lost by the bootstrap capacitor will
be slightly larger than the charge acquired by the gate
capacitance of the power switch as shown in Equation 1:
where:
V
BS1
= C
BS
voltage immediately after refresh
V
BS2
= C
BS
voltage immediately before refresh
C
BS
= Bootstrap capacitance
Q
G
= Turn-on Gate charge transferred
Figure 6 will help to understand the operation of the boot-
strap circuit. The figure shows the refresh current paths
which will charge the bootstrap capacitor to prepare it for
driving the upper power switch. As previously stated, when-
ever the lower switch, its body diode or an external flyback
diode conducts, the phase node (V
S
) to which the load is
connected, goes low toward the COM potential. The voltage
at V
CC
forces current through the bootstrap diode, the boot-
strap capacitor and the lower switch/diode combination as
shown by the arrows in Figure 6.
To charge the bootstrap capacitor quickly, without ringing or
excessive overshoot, maintain a short, tight bootstrap
refresh loop. This usually requires a low ESR decoupling
capacitor located adjacent to HIP2500 from V
CC
to COM
and close positioning of the power switches to the HIP2500.
The bootstrap capacitor and diode should also be located
adjacent to the HIP2500 to aid in keeping this loop as short
as possible, thereby minimizing the impedance of this loop.
To insure that the bootstrap capacitor voltage is maintained,
it is usually necessary to turn on the lower switch each and
every cycle of the PWM waveform. The duration of the
refresh period should be long enough to guarantee that
refreshing will be complete.
(EQ. 1)
QG
VBS1
VBS2
–
(
)
CBS
≈
LIN
SD
HIN
VSS
V
DD
+5V
COM
VS
VB
CBS
LOAD
BOOTSTRAP CURRENT FLOW
VCC
V
CC
+15V
FIGURE 6. HVIC BOOTSTRAP CHARGING PATH
Application Note 9010
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HIP4011 | Three Phase Brushless DC Motor Controller |
| HIP4011IS | Three Phase Brushless DC Motor Controller |
| HIP4020 | 30000 SYSTEM GATE 3.3 VOLT LOGIC CELL AR - NOT RECOMMENDED for NEW DESIGN |
| HIP4020IB | 30000 SYSTEM GATE 3.3 VOLT LOGIC CELL AR - NOT RECOMMENDED for NEW DESIGN |
| HIP4080 | 80V/2.5A Peak, High Frequency Full Bridge FET Driver |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HIP2500IB | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| HIP-2500IB | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| HIP2500IB96 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| HIP2500IP | 制造商:HARRIS 制造商全稱:HARRIS 功能描述:Half Bridge 500VDC Driver |
| HIP2500IP1 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。