參數(shù)資料
型號： HFA3860BIV96
廠商： HARRIS SEMICONDUCTOR
元件分類： 無繩電話/電話
英文描述： nullDirect Sequence Spread Spectrum Baseband Processor
中文描述： TELECOM, CELLULAR, BASEBAND CIRCUIT, PQFP48
文件頁數(shù)： 24/40頁
文件大?。?/td> 272K
代理商： HFA3860BIV96
4-24
P
C
RSSI (14)
3-BIT
A/D
I
IN
(12)
Q
IN
(13)
6-BIT
A/D
REF
2V
1.75V
(MAX)
0.25V
(MIN)
V
REFP
(16)
V
REFN
(17)
VR3+
VR3-
RSSI
REF
3
3
MF CORRELATOR
11-BIT BARKER
MF CORRELATOR
11-BIT BARKER
S
CLEAR CHANNEL
ASSESSMENT/
SIGNAL QUALITY
(32) CCA
BIT
SYNC
PHASE
ROTATE
PSK
DEMOD
LEAD
/LAG
FILTER
NCO
PHASE
ERROR
RX_DATA
DESCRAMBLER
(35) RXD
(3) TXD
P
(36) RXCLK
Z
-1
XOR
DIFF
DECODER
d(t)
d(t-1)
ANALOG
DE-SPREADER/ACQUISITION
DPSK DEMOD
AND AFC
TIMING
GENERATOR
MCLK
8
8
SIGNAL
QUALITY
AND
RSSI
S
T
(10, 18, 20)
V
DD
(ANALOG)
(7, 21, 29, 42)
V
DD
(DIGITAL)
(11, 15, 19)
GND (ANALOG)
(6, 22, 31, 41)
GND (DIGITAL)
(4) TXCLK
(5) TX_RDY
(2) TX_PE
(33) RX_PE
S
(34) MD_RDY
ANTSEL (27)
(24) SCLK
(25) SD
(23) SDI
(8) R/W
(9) CS
S
P
T
P
R
P
(30)
MCLK
(28)
RESET
T
(38)
T
(37)
(39)
T
(40)
T
(43)
T
(44)
T
(45)
T
(46)
T
TEST PORT
TEST_CK
(1)
A/D REF
AND
LEVEL ADJ.
MAG. /
PHASE
AND
TIMING
DISTRIB.
8
3-BIT
A/D
SIN/COS
ROM
COMPLX
MULTIPLY
CARRIER
PHASE
DETECT
NCO
WALSH
CORREL
LEAD
/LAG
FILTER
CHIP
PHASE
DETECT
TIMING
LOOP
FILTER
SYMBOL
DECISION
SIGN
CORRECT,
PISO
DIFF.
DECODE
CLOCK
ENABLE
LOGIC
HIGH RATE SECTION
PHASE AND FREQ JAM
ANTSEL (26)
FIGURE 15. DSSS BASEBAND PROCESSOR, RECEIVE SECTION
HFA3860B
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參數(shù)描述
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