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參數(shù)資料
| 型號： | HDMP-0482 |
| 英文描述： | Octal Cell Port Bypass Circuit with CDR and Data Valid Detection |
| 中文描述： | 八路細(xì)胞端口旁路電路CDR和數(shù)據(jù)有效檢測 |
| 文件頁數(shù)： | 8/12頁 |
| 文件大?。?/td> | 149K |
| 代理商： | HDMP-0482 |
8
HDMP-0482 DC Electrical Specifications
, T
a
= 0
°
C to +70
°
C, V
CC
= 3.15V to 3.45V
Symbol
Parameter
Min.
Typ.
Max.
Units
V
IH,LVTTL
V
IL,LVTTL
V
OH,LVTTL
V
OL,LVTTL
I
IH,LVTTL
I
IL,LVTTL
I
CC
LVTTL Input High Voltage Range
2.0
4.0
V
LVTTL Input Low Voltage Range
0
0.8
V
LVTTL Output High Voltage Range, I
OH
= -400
μ
A
LVTTL Output Low Voltage Level, I
OL
= 1 mA
Input High Current (Magnitude), V
IN
= 2.4 V, V
CC
= 3.45 V
Input Low Current (Magnitude), V
IN
= 0.4 V, V
CC
= 3.45 V
Total Supply Current, T
a
= 25
°
C
2.2
3.45
V
0
0.6
V
.003
40
μ
A
300
600
μ
A
330
400
mA
HDMP-0482 AC Electrical Specifications
, T
a
= 0
°
C to +70
°
C, V
CC
= 3.15V to 3.45V
Symbol
Parameter
Min.
Typ.
Max.
Units
t
loop
t
cell
t
r,LVTTLin
t
f,LVTTLin
t
rs,HS_OUT
t
fs,HS_OUT
t
rd,HS_OUT
t
fd,HS_OUT
V
IP,HS_IN
V
OPHS_OUT
Total Loop Latency from FM_NODE[0] to TO_NODE[0]
2.8
4.2
ns
Per Cell Latency from FM_NODE[7] to TO_NODE[0]
0.5
0.8
ns
Input LVTTL Rise Time Requirement, 0.8 V to 2.0 V
2
ns
Input LVTTL Fall Time Requirement, 2.0 V to 0.8 V
2
ns
HS_OUT Single-Ended Rise Time, 20%-80%
200
350
ps
HS_OUT Single-Ended Rise Time, 20%-80%
200
350
ps
HS_OUT Differential Rise Time, 20%-80%
200
350
ps
HS_OUT Differential Rise Time, 20%-80%
200
350
ps
HS_IN Input Peak to Peak Required Differential Voltage Range
400
1200
2000
mV
HS_OUT Output Pk-Pk Diff. Voltage Range (Z0=75
, Fig. 9)
1100
1400
2000
mV
HDMP-0482 Output Jitter Characteristics
, T
a
= 0
°
C to +70
°
C, V
CC
= 3.15V to 3.45V
Symbol
Parameter
Unit
Typ.
Max.
RJ
Random Jitter at TO_NODE pins (1 sigma rms)
ps
5
DJ
Deterministic Jitter at TO_NODE pins (pk-pk)
ps
24
Please refer to Figures 6 and 7 for jitter measurement setup information.
HDMP-0482 Locking Characteristics
, T
a
= 0
°
C to +70
°
C, V
CC
= 3.15V to 3.45V
Parameter
Unit
Max.
Bit Sync Time (phase lock)
bits
2500
Frequency Lock at Powerup
μ
s
500
HDMP-0482 Power Dissipation
, T
a
= 0
°
C to +70
°
C, V
CC
= 3.15V to 3.45V
Symbol
Parameter
Unit
Typ.
Max.
P
D
Power Dissipation
mW
1090
1380
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