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參數資料
| 型號： | GS9062-CFE3 |
| 廠商： | Gennum Corporation |
| 英文描述： | GS9062 HD-LINX-TM II SD-SDI and DVB-ASI Serializer |
| 中文描述： | GS9062的HD - LINX進程，商標第二SD - SDI和DVB - ASI在內串行器 |
| 文件頁數： | 29/46頁 |
| 文件大小： | 473K |
| 代理商： | GS9062-CFE3 |
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GS9062 Data Sheet
22209 - 5
May 2005
29 of 46
3.6.3.1 SMPTE 352M Payload Identifier Insertion
The GS9062 can generate and insert SMPTE 352M payload identifier ancillary
data packets into the data stream, based on information programmed into the host
interface.
When this feature is enabled, the device will automatically generate the ancillary
data preambles, (DID, SDID, DBN, DC), and calculate the checksum. The SMPTE
352M packet will be inserted into the data stream according to the line number and
sample position rules defined in the standard. Where an alternate insertion line is
required, the host interface may program the LINE_352M registers (
Table 3-6
) with
the appropriate line numbers.
The insertion process will only take place if one or more of the four
VIDEO_FORMAT registers (
Table 3-7
) have been programmed with non-zero
values. In addition, the GS9062 requires the 352M_INS bit of the
IOPROC_DISABLE register be set LOW.
NOTE 1: For the purpose of determining the line and pixel position for insertion, the
GS9062 will differentiate between PsF and interlaced formats by interrogating bits
14 and 15 of the VIDEO_FORMAT_A register.
The packets will be inserted immediately after the EAV word.
NOTE 2: It is the responsibility of the user to ensure that there is sufficient space
in the horizontal blanking interval for the insertion of the SMPTE 352M packets.
If there are other ancillary data packets present, the SMPTE 352M packet will be
inserted in the first available location in the horizontal ancillary space. Ancillary
data must be adjacent to the EAV.
3.6.3.2 Illegal Code Remapping
If the ILLEGAL_REMAP bit of the IOPROC_DISABLE register is set LOW, the
GS9062 will remap all codes within the active picture between the values of 3FCh
and 3FFh to 3FBh. All codes within the active picture area between the values of
000h and 003h will be remapped to 004h.
In addition, 8-bit TRS and ancillary data preambles will be remapped to 10-bit
values if this feature is enabled.
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|---|---|
| GS9064-CKD | GS9064 SD SDI Adaptive Cable Equalizer |
| GS9064-CKDE3 | GS9064 SD SDI Adaptive Cable Equalizer |
| GS9064A | GS9064A HD-LINX㈢ II Adaptive Cable Equalizer |
| GS9064ACKDE3 | GS9064A HD-LINX㈢ II Adaptive Cable Equalizer |
| GS9074A | GS9074A HD-LINX-R II Adaptive Cable Equalizer |
相關代理商/技術參數 |
參數描述 |
|---|---|
| GS9064 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecomm/Datacomm |
| GS9064A | 制造商:GENNUM 制造商全稱:GENNUM 功能描述:GS9064A HD-LINX㈢ II Adaptive Cable Equalizer |
| GS9064ACKDE3 | 制造商:Semtech Corporation 功能描述:Adaptive Cable Equalizer. High-speed BiCMOS integrated circuit. 16-Pin SOIC 制造商:Semtech Corporation 功能描述:SD/ASI Adaptive Equalizer |
| GS9064ACTDE3 | 制造商:Semtech Corporation 功能描述:SD/ASI Adaptive Equalizer |
| GS9064-CKD | 制造商:Rochester Electronics LLC 功能描述: 制造商:Gennum Corporation 功能描述: |
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