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| 型號(hào)： | GS1582 |
| 廠商： | Gennum Corporation |
| 英文描述： | IC,MC14490P |
| 中文描述： | 多速率的電纜驅(qū)動(dòng)器，音頻多路復(fù)用器和ClockCleaner⑩串行 |
| 文件頁(yè)數(shù)： | 47/114頁(yè) |
| 文件大小： | 1224K |
| 代理商： | GS1582 |
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GS1582 Data Sheet
40117 - 1 November 2007
47 of 114
4.7.9.3 Audio Control Packet Insertion
To multiplex audio control packets for audio group 1 channels 1 to 4 (inputs Ain_1/2
and Ain_3/4), the CTRA_ON bit of the host interface must be set HIGH. To
multiplex audio control packets for audio group 2 channels 5 to 8 (inputs Ain_5/6
and Ain_7/8), the CTRB_ON bit must be set HIGH. In addition, the multiplexer will
only embed or replace group 1 control packets if one or more of ACT1, ACT2,
ACT3 and ACT4 are set. Similarly, group 2 control packets will only be embedded
or replaced if ACT5, ACT6, ACT7 or ACT8 are set.
By default, the audio control packets are embedded. The audio frame sequence is
also embedded for 29.97fps video standards. Setting the AFNA_AUTO and
AFNB_AUTO bits in the host interface LOW disable the audio frame sequence
insertion. When set LOW, the audio frame number will be set to zero (200h). The
RATE word is always set to zero to denote 48kHz audio only.
Control packet data can be programmed via the corresponding registers in the host
interface.
Refer to
Section 4.13.3
for HD and SD audio multiplexer status and configuration
registers.
4.7.10 Setting Packet DID
The audio group DID for audio group 1 input channels 1 to 4 (Ain_1/2 and Ain_3/4)
is set in the IDA[1:0] bits of the host interface. The audio group DID for audio group
2 input channels 5 to 8 (Ain_5/6 and Ain_7/8) is set in IDB[1:0] of the host interface.
Table 4-10
shows the 2-bit host interface setting for the corresponding audio group
DID.
For 24-bit audio support using the SD core, the extended audio group DID for audio
group 1 input channels 1 to 4 is set to the same group in IDA[1:0] of the host
interface. The extended audio group DID for audio group 2 input channels 5 to 8 is
set to the same group in IDB[1:0] of the host interface. 24-bit support is selected by
setting the 24BIT bit of host interface HIGH.
When the host interface CASCADE bit is set LOW, the audio core defaults to audio
groups 1 and 2, where Ain_1/2 and Ain_3/4 are multiplexed with audio group 1
DID, and Ain_5/6 and Ain_7/8 with audio group 2 DID.
DELB0-3
3
Ch3/4 Delay Data
–
27-bit Host Interface
setting
RSRV
2
Reserved Words
200h
Yes
CS
1
Checksum. Calculates the sum of
lower 9 bits of 15 words from DID
–
Yes
Table 4-9: Audio Control Packet Word Descriptions (Continued)
Name
No. of
Words
Description
Data
Auto-Generation
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| GS1582-IBE3 | IC,MOT,MC145026P, DIP-16, ENCODER 9 LINE SIMPLEX |
| GS4900B | SD Clock and Timing Generator with GENLOCK |
| GS4900BCNE3 | SD Clock and Timing Generator with GENLOCK |
| GS4901B | SD Clock and Timing Generator with GENLOCK |
| GS4901BCNE3 | SD Clock and Timing Generator with GENLOCK |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| GS1582_09 | 制造商:GENNUM 制造商全稱:GENNUM 功能描述:Multi-Rate Serializer with Cable Driver, Audio Multiplexer and ClockCleaner |
| GS1582-IBE3 | 功能描述:RF, RFID, WIRELESS RoHS:是 類別:集成電路 (IC) >> 接口 - 串行器，解串行器 系列:* 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- 功能:解串器 數(shù)據(jù)速率:2.5Gbps 輸入類型:串行 輸出類型:并聯(lián) 輸入數(shù):- 輸出數(shù):24 電源電壓:1.8 V ~ 3.3 V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:64-TQFP 裸露焊盤 供應(yīng)商設(shè)備封裝:64-TQFP-EP（10x10） 包裝:管件 |
| GS-158N | 制造商:Taiyo Electric Ind. 功能描述: |
| GS15A | 制造商:MEANWELL 制造商全稱:Mean Well Enterprises Co., Ltd. 功能描述:7.2~15WAC-DC Single Output Desktop |
| GS15A/B | 功能描述:插入式交流適配器 RoHS:否 制造商:Phihong 地區(qū):Universal 安裝風(fēng)格:Wall, Interchangeable Plug 輸入電壓范圍:90 VAC to 264 VAC 輸出端數(shù)量:1 輸出功率額定值:5 W 輸出電壓（通道 1）:5 V 輸出電流（通道 1）:1 A 直流輸出連接器:USB Type A 隨附/必需的交流插頭:Required 商用/醫(yī)用:Commercial 效率:Level V |
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