參數(shù)資料
型號: GS1582
廠商: Gennum Corporation
英文描述: IC,MC14490P
中文描述: 多速率的電纜驅(qū)動器,音頻多路復用器和ClockCleaner⑩串行
文件頁數(shù): 35/114頁
文件大?。?/td> 1224K
代理商: GS1582
GS1582 Data Sheet
40117 - 1 November 2007
35 of 114
NOTE: 8b/10b encoding will take place after K28.5 sync character insertion.
KIN should be set HIGH whenever the parallel data input is to be interpreted as any
special character defined by the DVB-ASI standard (including the K28.5 sync
character). This pin should be set LOW when the input is to be interpreted as data.
NOTE: When operating in DVB-ASI mode, DIN[9:0] are set to high impedance.
Figure 4-9: DVB-ASI FIFO Implementation using the GS1582
4.5 Data-Through Mode
The GS1582 may be configured to operate as a simple parallel-to-serial converter.
In this mode, the device passes data to the serial output without performing any
scrambling or encoding.
Data-through mode is enabled only when both the SMPTE_BYPASS and
DVB_ASI pins are set LOW.
4.6 Standby Mode
In standby mode, the power consumption of the GS1582 is reduced to 125mW.
Standby mode is enabled when the STANDBY pin is set HIGH. Once the
STANDBY pin is set HIGH, it may take up to 50ms for power reduction to take
place.
In this mode, the serial output pins are set to high impedance, and the GS1582
loses lock to the reference input PCLK. While in standby mode, the programmed
register values are retained. However, no registers can be accessed for reading
or writing via the GSPI port. No write bits will be captured and all read functions will
return a value of 0.
The power in standby mode can be further reduced through two means:
1. Eliminate activity on all parallel data and clock inputs. This can be achieved
by setting the parallel data and clock HIGH, or not driving them. Setting the
parallel inputs to LOW is not recommended as it will result in a smaller power
saving.
2. Remove the 3.3V supply to the CD_VDD pin of the device.
The standby power consumption under various conditions is shown in
Table 4-2:
Standby Power Consumption
.
8
8
AIN ~ HIN
PCLK = 27MHz
INSSYNCIN
SDO
SDO
CLK_IN
CLK_OUT
FIFO
WRITE_CLK
<27MHz
FIFO_EMPTY
TS
KIN
GS1582
KIN
READ CLK
=27MHz
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