參數(shù)資料
型號: GS1561-CFE3
廠商: Gennum Corporation
英文描述: GS1560A/GS1561 HD-LINX-R II Dual-Rate Deserializer
中文描述: GS1560A/GS1561的HD - LINX進程- R的第二雙率解串器
文件頁數(shù): 34/80頁
文件大?。?/td> 842K
代理商: GS1561-CFE3
GS1560A/GS1561 Data Sheet
27360 - 8
September 2005
34 of 80
3.4.2 Reclocker Bypass Control
The serial digital loop-through output may be either a buffered version of the serial
digital input signal, or a reclocked version of that signal.
When operating in slave mode, the application layer may choose the reclocked
output by setting RC_BYP to logic HIGH. If RC_BYP is set LOW, the data stream
will bypass the internal reclocker and the serial digital output will be a buffered
version of the input.
When operating in master mode, the device will assert the RC_BYP pin HIGH only
when it has successfully locked to a SMPTE or DVB-ASI input data stream, (see
Lock Detect on page 35
). In this case, the serial digital loop-through output will be
a reclocked version of the input.
3.4.3 Serial Digital Output Mute
The GS1560A will automatically mute the serial digital loop-through output in both
master and slave modes when the internal carrier_detect signal indicates an
invalid serial input.
The loop-through output will also be muted in slave mode when SDO/SDO is
selected as reclocked, (RC_BYP = HIGH), but the lock detect block has failed to
lock to the data stream, (LOCKED = LOW).
Table 3-1
summarizes the possible states of the serial digital loop-through output
data stream.
Table 3-1: Serial Digital Loop-Through Output Status
SLAVE MODE
SDO
CD
LOCKED
RC_BYP
(INPUT)
RECLOCKED
LOW
HIGH
HIGH
BUFFERED
LOW
X
LOW
MUTED
LOW
LOW
HIGH
MUTED
HIGH
LOW*
X
MASTER MODE
SDO
CD
LOCKED
RC_BYP
(OUTPUT)
RECLOCKED
LOW
HIGH
HIGH
BUFFERED
LOW
LOW
LOW
MUTED
HIGH
LOW*
LOW
*NOTE: LOCKED = HIGH if and only if CD = LOW
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