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GENNUM CORPORATION
21498-1
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3.4 DVB-ASI MODE
The GS1532 is said to be in DVB-ASI mode when the
SMPTE_BYPASS pin is set LOW and the DVB_ASI and
SD/HD pins are set HIGH.
In this mode, all SMPTE processing functions are disabled,
and the 8-bit transport stream data will be 8b/10b encoded
prior to serialization.
3.4.1 Control Signal Inputs
In DVB-ASI mode, the DIN19 and DIN18 pins will be
configured as DVB-ASI control signals INSSYNCIN and KIN
respectively.
When INSSYNCIN is set HIGH, the device will insert K28.5
sync characters into the data stream. This function is used
to assist system implementations where the GS1532 may
be preceded by an external data FIFO. Parallel DVB-ASI
data may be clocked into the FIFO at some rate less than
27MHz. The INSSYNCIN input may then be connected to
the FIFO empty signal, thus providing a means of padding
up the data transmission rate to 27MHz. See Figure 9.
NOTE: 8b/10b encoding will take place after K28.5 sync
character insertion.
KIN should be set HIGH whenever the parallel data input is
to be interpreted as any special character defined by the
DVB-ASI standard (including the K28.5 sync character).
This pin should be set LOW when the input is to be
interpreted as data.
NOTE: When operating in DVB-ASI mode, DIN[9:0] become
high impedance.
Figure 9 DVB-ASI FIFO Implementation using the GS1532
3.5 DATA-THROUGH MODE
The GS1532 may be configured by the application layer to
operate as a simple parallel-to-serial converter. In this
mode, the device presents data to the output buffer without
performing any scrambling or encoding.
Data-through mode is enabled only when both the
SMPTE_BYPASS and DVB_ASI pins are set LOW.
3.6 ADDITIONAL PROCESSING FUNCTIONS
The GS1532 contains an additional data processing block
which is available in SMPTE mode only, (see Section 3.3).
3.6.1 Input Data Blank
The video input data may be 'blanked' by the GS1532. In
this mode, all input video data except TRS words are set to
the appropriate blanking levels by the device. Both the
horizontal and vertical ancillary data spaces will also be set
to blanking levels.
This function is enabled by setting the BLANK pin LOW.
3.6.2 Automatic Video Standard Detection
The GS1532 can detect the input video standard by using
the timing parameters extracted from the received TRS ID
words or supplied H, V, and F timing signals (see Section
3.3.1). This information is presented to the host interface via
the VIDEO_STANDARD register (Table 2).
Total samples per line, active samples per line, total lines
per field/frame and active lines per field/frame are also
calculated and presented to the host interface via the
RASTER_STRUCTURE registers (Table 3). These line and
sample count registers are updated once per frame at the
end of line 12. This is in addition to the information
contained in the VIDEO_STANDARD register.
After device reset, the four RASTER_STRUCTURE registers
default to zero.
8
8
AIN ~ HIN
PCLK = 27MHz
INSSYNCIN
SDO
SDO
CLK_IN
CLK_OUT
FIFO
WRITE_CLK
<27MHz
FE
TS
KIN
GS1532
KIN
READ CLK
=27MHz