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參數(shù)資料
| 型號(hào)： | GS1535 |
| 英文描述： | Multi-rate Reclocker for HD-SDI. SD-SDI & DVB-ASI. 3.3V supply. |
| 中文描述： | 多速率時(shí)鐘恢復(fù)器的HD - SDI的。標(biāo)清SDI |
| 文件頁數(shù)： | 20/39頁 |
| 文件大?。?/td> | 631K |
| 代理商： | GS1535 |
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GENNUM CORPORATION
21498-1
20 of 39
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3. DETAILED DESCRIPTION
3.1 FUNCTIONAL OVERVIEW
The GS1532 is a multi-rate serializer with an integrated
cable driver. When used in conjunction with the external
GO1525 Voltage Controlled Oscillator, a transmit solution at
1.485Gb/s, 1.485/1.001Gb/s or 270Mb/s is realized.
The device has three different modes of operation which
must be set by the application layer through external device
pins.
When SMPTE mode is enabled, the device will accept 10-
bit multiplexed or 20-bit demultiplexed SMPTE compliant
data at both HD and SD signal rates. The device’s
additional processing features are also enabled in this
mode.
In DVB-ASI mode, the GS1532 will accept an 8-bit parallel
DVB-ASI compliant transport stream on its upper input bus.
The serial output data stream will be 8b/10b encoded and
stuffed.
The GS1532’s third mode allows for the serializing of data
not conforming to SMPTE or DVB-ASI streams.
The provided serial digital outputs feature a high
impedance mode, output mute on loss of parallel clock and
adjustable signal swing. The output slew rate is
automatically controlled by the SD/HD setting.
In the digital signal processing core, several data
processing functions are implemented including SMPTE
352M and EDH data packet generation and insertion, and
automatic video standards detection. These features are all
enabled by default, but may be individually disabled via
internal registers accessible through the GSPI host
interface.
Finally, the GS1532 contains a JTAG interface for boundary
scan test implementations.
3.2 PARALLEL DATA INPUTS
Data inputs enter the device on the rising edge of PCLK as
shown in Figure 7.
The input data format is defined by the setting of the
external SD/HD, SMPTE_BYPASS and DVB_ASI pins and
may be presented in 10-bit or 20-bit format. The input data
bus width is controlled independently from the internal data
bus width by the 20bit/10bit input pin.
Figure 7 PCLK to Data Timing
3.2.1 Parallel Input in SMPTE Mode
When the device is operating in SMPTE mode, (see Section
3.3), both SD and HD data may be presented to the input
bus in either multiplexed or demultiplexed form depending
on the setting of the 20bit/10bit input pin.
In 20-bit mode, (20bit/10bit = HIGH), the input data format
should be word aligned, demultiplexed luma and chroma
data. Luma words should be presented to DIN[19:10] while
chroma words should occupy DIN[9:0].
In 10-bit mode, (20bit/10bit = LOW), the input data format
should be word aligned, multiplexed luma and chroma
data. The data should be presented to DIN[19:10]. DIN[9:0]
will be high impedance in this mode.
PCLK
DIN[19:0]
DATA
Control signal
input
t
IS
t
IH
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| GS1560A* | Reclocking deserializer for HD-SDI. SD-SDI & DVB-ASI with loop thru cable driver. 3.3/1.8V supply. |
| GS1561* | Reclocking deserializer for HD-SDI. SD-SDI & DVB-ASI without loop thru cable driver. 3.3/1.8V supply. |
| GS15T48-5 | 15W DC-DC CONVERTER |
| GS15T48 | |
| GS15T5-5.2 | DC-to-DC Voltage Converter |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| GS1535A | 制造商:GENNUM 制造商全稱:GENNUM 功能描述:Multi-Rate SDI Automatic Reclocker |
| GS1535A_06 | 制造商:GENNUM 制造商全稱:GENNUM 功能描述:Multi-Rate SDI Automatic Reclocker |
| GS1535ACFUE3 | 制造商:GENNUM 制造商全稱:GENNUM 功能描述:Multi-Rate SDI Automatic Reclocker |
| GS1535BCFUE3 | 制造商:Gennum Corporation 功能描述:IC RELOCKER HD/SD/ASI 64LQFP 制造商:Gennum Corporation 功能描述:IC, RELOCKER, HD/SD/ASI, 64LQFP 制造商:Gennum Corporation 功能描述:IC, RELOCKER, HD/SD/ASI, 64LQFP; Supply Voltage Min:3.135V; Supply Voltage Max:3.465V; Digital IC Case Style:LQFP; No. of Pins:64; Operating Temperature Min:0C; Operating Temperature Max:70C; MSL:MSL 3 - 168 hours; SVHC:No SVHC |
| GS1535-CFU | 制造商:Rochester Electronics LLC 功能描述: 制造商:Gennum Corporation 功能描述: |
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