參數(shù)資料
型號: GS1532*
英文描述: Serializer for HD-SDI. SD-SDI & DVB-ASI. 3.3/1.8V supply.
中文描述: 序列化的HD - SDI信號。標清SDI
文件頁數(shù): 33/39頁
文件大?。?/td> 631K
GENNUM CORPORATION
21498-1
33 of 39
G
3.9 SERIAL DIGITAL OUTPUT
The GS1532 contains an integrated current mode
differential serial digital cable driver with automatic slew
rate control.
To enable the output, SDO_EN/DIS must be set HIGH by
the application layer. Setting the SDO_EN/DIS signal LOW
will cause the SDO and SDO output pins to become high
impedance,
resulting
in
consumption.
reduced
device
power
With suitable external return loss matching circuitry, the
GS1532's serial digital outputs will provide a minimum
output return loss of -15dB at SD rates. Gennum
recommends using the GS1528 SDI Dual Slew-Rate Cable
Driver to meet output return loss specifications at HD rates.
The integrated cable driver uses a separate power supply
of +1.8V DC supplied via the CD_VDD and CD_GND pins.
3.9.1 Output Swing
Nominally, the voltage swing of the serial digital output is
800mVp-p single-ended into a 75
load. This is set
externally by connecting the RSET pin to CD_VDD through
281
.
The output swing may be decreased by increasing the
value of the RSET resistor. The relationship is approximated
by the curve shown in Figure 10.
Alternatively, the serial digital output swing can drive
800mVp-p into a 50
load. Since the output swing is
reduced by a factor of approximately one third when the
smaller load is used, the RSET resistor must be 187
to
obtain 800mVp-p.
Figure 10 Serial Digital Output Swing
3.9.2 Serial Digital Output Mute
The GS1532 will automatically mute the serial digital output
when the LOCKED output signal is LOW. In this case, the
SDO and SDO signals are set to a constant voltage level.
3.10 GSPI HOST INTERFACE
The GSPI, or Gennum Serial Peripheral Interface, is a 4-wire
interface provided to allow the host to enable additional
features of the device and /or to provide additional status
information through configuration registers in the GS1532.
The GSPI comprises a serial data input signal SDIN, serial
data output signal SDOUT, an active low chip select CS,
and a burst clock SCLK.
Because these pins are shared with the JTAG interface
port, an additional control signal pin JTAG/HOST is
provided. When JTAG/HOST is LOW, the GSPI interface is
enabled.
When operating in GSPI mode, the SCLK, SDIN, and CS
signals are provided by the host interface. The SDOUT pin
is a high-impedance output allowing multiple devices to be
connected in parallel and selected via the CS input. The
interface is illustrated in the Figure 11 below.
All read or write access to the GS1532 is initiated and
terminated by the host processor. Each access always
begins with a 16-bit command word on SDIN indicating the
address of the register of interest. This is followed by a 16-
bit data word on SDIN in write mode, or a 16-bit data word
on SDOUT in read mode.
Figure 11 Gennum Serial Peripheral Interface (GSPI)
50
load
300
400
500
600
700
800
900
1000
250 300 350 400 450 500 550 600 650 700
RSET(
)
V
200
75
load
SCLK
CS
SDOUT
SDIN
SCLK
CS
SDIN
SDOUT
Application Host
GS1532
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