參數(shù)資料
型號: GS1532*
英文描述: Serializer for HD-SDI. SD-SDI & DVB-ASI. 3.3/1.8V supply.
中文描述: 序列化的HD - SDI信號。標清SDI
文件頁數(shù): 25/39頁
文件大?。?/td> 631K
GENNUM CORPORATION
21498-1
25 of 39
G
TABLE 2 HOST INTERFACE DESCRIPTION FOR VIDEO STANDARD REGISTER
3.6.2.1 Video Standard Indication
The video standard codes reported in the VD_STD[4:0] bits
of the VIDEO_STANDARD register represent the SMPTE
standards as shown in Table 4.
In addition to the 5-bit video standard code word, the
VIDEO_STANDARD register also contains two status bits.
The STD_LOCK bit will be set HIGH whenever the flywheel
has achieved full synchronization. The INT_PROG bit will be
set HIGH if the detected video standard is progressive and
LOW if the detected video standard is interlaced.
The VD_STD[4:0], STD_LOCK and INT_PROG bits of the
VIDEO_STANDARD register will default to zero after device
reset. These bits will also default to zero if the
SMPTE_BYPASS pin is asserted LOW or if the LOCKED
output is LOW.
REGISTER NAME
BIT
NAME
DESCRIPTION
R/W
DEFAULT
VIDEO_STANDARD
Address: 004h
15
Not Used
14-10
VD_STD[4:0]
Video Data Standard (see Table 4)
R
0
9
INT_PROG
Interlace/Progressive: Set HIGH if detected video
standard is PROGRESSIVE and is set LOW if it is
INTERLACED.
R
0
8
STD_LOCK
Standard Lock: Set HIGH when flywheel has achieved
full synchronization.
R
0
7-0
Not Used
TABLE 3 HOST INTERFACE DESCRIPTION FOR RASTER STRUCTURE REGISTERS
REGISTER NAME
BIT
NAME
DESCRIPTION
R/W
DEFAULT
RASTER_STRUCTURE1
Address: 014h
15-12
Not Used
11-0
RASTER_STRUCTURE_1[11:0]
Words Per Active Line
R
0
RASTER_STRUCTURE2
Address: 015h
15-12
Not Used
11-0
RASTER_STRUCTURE_2[11:0]
Words Per Total Line.
R
0
RASTER_STRUCTURE3
Address: 016h
15-11
Not Used
10-0
RASTER_STRUCTURE_3[10:0]
Total Lines Per Frame
R
0
RASTER_STRUCTURE4
Address: 017h
15-11
Not Used
10-0
RASTER_STRUCTURE_4[10:0]
Active Lines Per Field
R
0
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