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參數(shù)資料
| 型號： | GL800HT25 |
| 廠商： | Genesys Logic, Inc. |
| 英文描述： | USB 2.0 UTMI Compliant Transceiver IP Core |
| 中文描述： | 采用UTMI兼容的USB 2.0收發(fā)器IP核 |
| 文件頁數(shù)： | 8/20頁 |
| 文件大小： | 172K |
| 代理商： | GL800HT25 |
GL800HT25 USB 2.0 UTMI Compliant Transceiver IP Core
2000-2003 Genesys Logic Inc.—All rights reserved.
Page 8
CHAPTER 3 BLOCK DIAGRAM
3.1 System Configuration
UTMI
SIE
(Serial Interface
Engine)
Device
Specific Logic
GL800
USB 2.0 Transceiver Macrocell Interface
USB 2.0
Figure 3.1 - System Diagram
1. GL800HT25
The USB 2.0 UTMI Transceiver, which handles the low level USB protocol and signaling, and shifts the
clock domain of the data from the USB 2.0 rate to one that is compatible with the general logic.
2. Serial Interface Engine
The Serial Interface Engine can be further sub-divided into 2 types of sub-blocks; the SIE control logic and
the Endpoint logic. The SIE control logic contains the USB PID and address recognition logic, and other
sequencing and state machine logic to handle USB packets and transactions. The Endpoint logic contains
the endpoint specific logic: endpoint number recognition, FIFOs and FIFO control, etc.
SIE logic module can be developed by peripheral vendors or purchased from IP vendors. The
standardization of the UTMI allows multiple sources of SIE logic to connect with GL800HT25 to
implement the USB 2.0 High-Speed design.
3. Device Specific Logic
This block is the glue that ties the USB interface to the specific application of the device.
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| GL811E-MNGXX | USB 2.0 to ATA / ATAPI Bridge Controller |
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| GL811E-MSGXX | USB 2.0 to ATA / ATAPI Bridge Controller |
| GL811E-MSNXX | USB 2.0 to ATA / ATAPI Bridge Controller |
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| GL80-RT/32/40A/98A | 制造商:PEPPERL+FUCHS 功能描述:Sensor, Photoelectric, Slot |
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| GL811E | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:USB 2.0 to ATA / ATAPI Bridge Controller |
| GL811E-04G | 制造商:GENESYS-LOGIC 功能描述: |
| GL811E-MNGXX | 制造商:GENESYS 制造商全稱:GENESYS 功能描述:USB 2.0 to ATA / ATAPI Bridge Controller |
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