參數(shù)資料
型號: FT232HQ-REEL
廠商: FTDI, Future Technology Devices International Ltd
文件頁數(shù): 3/65頁
文件大?。?/td> 0K
描述: IC HS USB TO UART/FIFO 48QFN
應(yīng)用說明: FT1248 Application Note
標(biāo)準(zhǔn)包裝: 1
通道數(shù): 1,UART
FIFO's: 4kb
規(guī)程: RS232,RS422,RS485
電源電壓: 1.62 V ~ 1.98 V,2.97 V ~ 3.63 V
帶并行端口:
帶故障啟動位檢測功能:
帶調(diào)制解調(diào)器控制功能:
安裝類型: 表面貼裝
封裝/外殼: 48-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 48-QFN(8x8)
包裝: 標(biāo)準(zhǔn)包裝
其它名稱: 768-1102-6
Copyright 2012 Future Technology Devices International Limited
11
Document No.: FT_000288
FT232H SINGLE CHANNEL HI-SPEED USB TO MULTIPURPOSE UART/FIFO IC
Datasheet Version 1.8
Clearance No.: FTDI #199
Pin No.
Name
Type
Description
45
EECS
I/O
EEPROM – Chip Select. Tri-State during device reset.
44
EECLK
OUTPUT
Clock signal to EEPROM. Tri-State during device reset. When not in reset, this
outputs the EEPROM clock.
43
EEDATA
I/O
EEPROM – Data I/O. Connect directly to Data-in of the EEPROM and to Data-out
of the EEPROM via a 2.2K resistor. Also, pull Data-Out of the EEPROM to VCCD
via a 10K resistor for correct operation. Tri-State during device reset.
Table 3.3 EEPROM Interface Group
Pin No.
Name
Type
Description
13
ADBUS0
Output
Configurable Output Pin, the default configuration is Transmit Asynchronous Data
Output.
14
ADBUS1
Input
Configurable Input Pin, the default configuration is Receiving Asynchronous Data
Input.
15
ADBUS2
Output
Configurable Output Pin, the default configuration is Request to Send Control
Output / Handshake Signal.
16
ADBUS3
Input
Configurable Input Pin, the default configuration is Clear To Send Control Input /
Handshake Signal.
17
ADBUS4
Output
Configurable Output Pin, the default configuration is Data Terminal Ready Control
Output / Handshake Signal.
18
ADBUS5
Input
Configurable Input Pin, the default configuration is Data Set Ready Control Input /
Handshake Signal.
19
ADBUS6
Input
Configurable Input Pin, the default configuration is Data Carrier Detect Control
Input.
20
ADBUS7
Input
Configurable Input Pin, the default configuration is Ring Indicator Control Input.
When remote wake up is enabled in the EEPROM taking RI# low can be used to
resume the PC USB host controller from suspend. (Also see note 1, 2, 3 in section
21
ACBUS0
I/O
Configurable ACBUS I/O Pin. Function of this pin is configured in the device
EEPROM. If the external EEPROM is not fitted the default configuration is TriSt-PU.
See ACBUS Signal Options, Table 3.5.
25
ACBUS1
I/O
Configurable ACBUS I/O Pin. Function of this pin is configured in the device
EEPROM. If the external EEPROM is not fitted the default configuration is TriSt-PU.
See ACBUS Signal Options, Table 3.5.
26
ACBUS2
I/O
Configurable ACBUS I/O Pin. Function of this pin is configured in the device
EEPROM. If the external EEPROM is not fitted the default configuration is TriSt-PU.
See ACBUS Signal Options, Table 3.5.
27
ACBUS3
I/O
Configurable ACBUS I/O Pin. Function of this pin is configured in the device
EEPROM. If the external EEPROM is not fitted the default configuration is TriSt-PU.
See ACBUS Signal Options, Table 3.5.
28
ACBUS4
I/O
Configurable ACBUS I/O Pin. Function of this pin is configured in the device
EEPROM. If the external EEPROM is not fitted the default configuration is TriSt-PU.
See ACBUS Signal Options, Table 3.5.
29
ACBUS5
I/O
Configurable ACBUS I/O Pin. Function of this pin is configured in the device
EEPROM. If the external EEPROM is not fitted the default configuration is TriSt-PU.
See ACBUS Signal Options, Table 3.5.
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