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參數(shù)資料
| 型號(hào)： | FT232HQ-REEL |
| 廠商： | FTDI, Future Technology Devices International Ltd |
| 文件頁數(shù)： | 24/65頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC HS USB TO UART/FIFO 48QFN |
| 應(yīng)用說明： | FT1248 Application Note |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 通道數(shù)： | 1，UART |
| FIFO's： | 4kb |
| 規(guī)程： | RS232，RS422，RS485 |
| 電源電壓： | 1.62 V ~ 1.98 V，2.97 V ~ 3.63 V |
| 帶并行端口： | 是 |
| 帶故障啟動(dòng)位檢測(cè)功能： | 是 |
| 帶調(diào)制解調(diào)器控制功能： | 是 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-VFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 48-QFN（8x8） |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 其它名稱： | 768-1102-6 |
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Copyright 2012 Future Technology Devices International Limited
30
Document No.: FT_000288
FT232H SINGLE CHANNEL HI-SPEED USB TO MULTIPURPOSE UART/FIFO IC
Datasheet Version 1.8
Clearance No.: FTDI #199
4.6 FT1248 Interface Mode Description
The FT232H supports a half duplex FT1248 Interface that provides a flexible data communication and
high performance interface between the FT232H as a FT1248 slave and an external FT1248 master. The
FT1248 protocol is a dynamic bi-directional data bus interface that can be configured as 1, 2, 4, or 8-bits
wide.
[7:0]
SCLK
MIOSIO
MISO
SS#
SCLK
MIOSIO
MISO
SS#
FPGA (FT1248 Master)
FT232H (FT1248 Slave)
Figure 4.7 FT1248 Bus with Single Master and Slave.
In the FT1248 there are 3 distinct phases:
While SS_n is inactive, the FT1248 reflects the status of the write buffer and read buffers on the
MIOSIO[0] and MISO wires respectively. Additionally, the FT1248 slave block supports multiple slave
devices where a master can communicate with multiple FT1248 slave devices. When the slave is sharing
buses with other FT1248 slave devices, the write and read buffer status cannot be reflected on the
MIOSIO[0] and MISO wires during SS_n inactivity as this would cause bus contention. Therefore, it is
possible for the user to select whether they wish to have the buffer status switched on or off during
inactivity. When SS_n is active a command/bus size phase occurs first. Following the command phase is
the data phase, for each data byte transferred the FT1248 slave drives an ACK/NAK status onto the MISO
wire. The master can send multiple data bytes so long as SS_n is active, if a unsuccessful data transfer
occurs, i.e. a NAK happens on the MISO wire then the master should immediately abort the transfer by
de-asserting SS_n.
BUS TURNAROUND
WRITE DATA
TXE#
CMD
CLK
SCLK
SS_n
MIOSIO[0]
RXF#
MISO
RXF#
RDATA0
RDATA1
RDATA2
TXE#
CMD
WDATA 0
WDATA 1
TXE#
WRITE
READ
RXF#
STATUS
Figure 4.8: FT1248 Basic Waveform Protocol.
Section 4.6.2 illustrates the FT1248 write and read protocol operating in 1-bit mode. For details regarding
2-bit, 4-bit and 8-bit modes, please refer to application note AN_167_FT1248 Parallel Serial Interface
Basics available at http://www.ftdichip.com.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| FT232HQ-TRAY | 功能描述:USB 接口集成電路 USB HS to UART/FIFO SPI/JTAG/I2C QFN-48 RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| FT232R | 制造商:FTDI 制造商全稱:FTDI 功能描述:USB UART IC - Single chip USB to asynchronous serial data transfer interface |
| FT232R_10 | 制造商:FTDI 制造商全稱:FTDI 功能描述:USB UART IC - Single chip USB to asynchronous serial data transfer interface |
| FT232RL | 制造商:Future Technology Devices International 功能描述:USB UART IC 28-Pin SSOP T/R 制造商:Future Technology Devices International (FTDI Chip) 功能描述:IC USB TO UART SMD SSOP28 232 制造商:Future Technology Devices International (FTDI Chip) 功能描述:IC, USB TO UART, SMD, 28SSOP 制造商:Future Technology Devices International (FTDI Chip) 功能描述:IC, USB UART INTERFACE, SSOP-28; USB Version:1.1, 2.0; Supply Voltage Min:1.8V; Supply Voltage Max:5.25V; Digital IC Case Style:SSOP; No. of Pins:28; Data Rate:3Mbps; Operating Temperature Min:-40C; Operating Temperature Max:85C ;RoHS Compliant: Yes |
| FT232RL R | 制造商:Future Technology Devices International Ltd 功能描述:UART, 28 Pin, Plastic, SSOP |
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