參數(shù)資料
型號: FT232HQ-REEL
廠商: FTDI, Future Technology Devices International Ltd
文件頁數(shù): 22/65頁
文件大?。?/td> 0K
描述: IC HS USB TO UART/FIFO 48QFN
應(yīng)用說明: FT1248 Application Note
標準包裝: 1
通道數(shù): 1,UART
FIFO's: 4kb
規(guī)程: RS232,RS422,RS485
電源電壓: 1.62 V ~ 1.98 V,2.97 V ~ 3.63 V
帶并行端口:
帶故障啟動位檢測功能:
帶調(diào)制解調(diào)器控制功能:
安裝類型: 表面貼裝
封裝/外殼: 48-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 48-QFN(8x8)
包裝: 標準包裝
其它名稱: 768-1102-6
Copyright 2012 Future Technology Devices International Limited
29
Document No.: FT_000288
FT232H SINGLE CHANNEL HI-SPEED USB TO MULTIPURPOSE UART/FIFO IC
Datasheet Version 1.8
Clearance No.: FTDI #199
4.5 FT245 Style Asynchronous FIFO Interface Mode Description
The FT232H can be configured as an asynchronous FIFO interface. This mode is similar to the
synchronous FIFO interface with the exception that the data is written to or read from the FIFO on the
falling edge of the WR# or RD# signals.
This mode does not provide a CLKOUT signal and it does not expect an OE# input signal. The following
diagrams illustrate the asynchronous FIFO mode timing.
Figure 4.5 FT245 Asynchronous FIFO Interface READ Signal Waveforms
Figure 4.6 FT245 Asynchronous FIFO Interface WRITE Signal Waveforms
Time
Description
Min
Max
Units
T1
RD# inactive to RXF#
1
14
ns
T2
RXF# inactive after RD# cycle
49
ns
T3
RD# to DATA
1
14
ns
T4
RD# active pulse width
30
ns
T5
RD# active after RXF#
0
ns
T6
WR# active to TXE# inactive
1
14
ns
T7
TXE# active to TXE# after WR# cycle
49
ns
T8
DATA to WR# active setup time
5
ns
T9
DATA hold time after WR# inactive
5
ns
T10
WR# active pulse width
30
ns
T11
WR# active after TXE#
0
ns
Table 4.2 Asynchronous FIFO Timings (based on standard drive level outputs)
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