參數(shù)資料
型號: FPD85310VJD
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 微控制器/微處理器
英文描述: Panel Timing Controller
中文描述: SPECIALTY MICROPROCESSOR CIRCUIT, PQFP100
封裝: PLASTIC, TQFP-100
文件頁數(shù): 1/29頁
文件大?。?/td> 440K
代理商: FPD85310VJD
FPD85310
Panel Timing Controller
General Description
The FPD85310 Panel Timing Controller is an integrated
FPD-Link based TFT-LCD timing controller. It resides on the
flat panel display and provides the interface signal routing
and timing control between graphics or video controllers and
a TFT-LCD system. FPD-Link is a low power, low electro-
magnetic interference interface used between this controller
and the host system.
The FPD85310 chip links the panel’s system interface to the
display via a ten wire LVDS data bus. That data is then
routed to the source and gate display drivers. XGA and
SVGA resolutions are supported.
The FPD85310 is programmable via an optional external se-
rial EEPROM. Reserved space in the EEPROM is available
for display identification information. The system can access
the EEPROM to read the display identification data or pro-
gram initialization values used by the FPD85310.
Features
n
FPD-Link System Interface utilizes Low Voltage
Differential Signaling (LVDS).
n
System programmable via EEPROM
n
Suitable for notebook and monitor applications
n
8-bit or 6-bit system interface
n
XGA or SVGA capable
n
Supports single or dual port column drivers
n
Programmable outputs provide customized control for
standard or in-house column drivers and row drivers
n
Fail-safe operation prevents panel damage with system
clock failure
n
Programmable skew rate controlled outputs on CD
interface for reduced EMI
n
Polarity pin reduces CD data bus switching
n
CMOS circuitry operates from a 3.3V supply
System Diagram
TRI-STATE
is a registered trademark of National Semiconductor Corporation.
DS101086-1
September 1999
F
1999 National Semiconductor Corporation
DS101086
www.national.com
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