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參數(shù)資料
| 型號(hào)： | FDMF8705 |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類(lèi)： | MOSFETs |
| 英文描述： | Driver plus FET Multi-chip Module |
| 中文描述： | HALF BRDG BASED MOSFET DRIVER, QCC56 |
| 封裝： | 8 X 8 MM, ROHS COMPLIANT, MO-220WLLD-5, SMD-56 |
| 文件頁(yè)數(shù)： | 11/13頁(yè) |
| 文件大?。?/td> | 742K |
| 代理商： | FDMF8705 |
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www.fairchildsemi.com
FDMF8705 Rev. C
F
Module Power Loss Measurement and
Calculation
Refer to Figure 27 for module power loss testing method. Power
loss calculation are as follows:
(a) P
IN
(b) P
OUT
(c) P
LOSS
= (V
IN
x I
IN
) + (V
CIN
x I
CIN
) (W)
= V
O
x I
OUT
(W)
= P
IN
- P
OUT
(W)
PCB Layout Guideline
Figure 28. shows a proper layout example of FDMF8705 and
critical parts. All of high current flow path, such as V
IN
, VSWH,
V
OUT
and GND copper, should be short and wide for better and
stable current flow, heat radiation and system performance.
Following is a guideline which the PCB designer should
consider:
1. Input bypass capacitors should be close to V
IN
and GND pin
of FDMF8705 to help reduce input current ripple component
induced by switching operation.
2. It is critical that the VSWH copper has minimum area for
lower switching noise emission. VSWH copper trace should
also be wide enough for high current flow. Other signal routing
path, such as PWM IN and BOOT signal, should be considered
with care to avoid noise pickup from VSWH copper area.
3. Output inductor location should be as close as possible to the
FDMF8705 for lower power loss due to copper trace.
4. Place ceramic bypass capacitor and boot capacitor as close
to VCIN and BOOT pin of FDMF8705 in order to supply stable
power. Routing width and length should also be considered.
5. Use multiple Vias on each copper area to interconnect each
top, inner and bottom layer to help smooth current flow and heat
conduction. Vias should be relatively large and of reasonable
inductance.
Figure 27. Power Loss Measurement Block Diagram
Figure 28. Typical PCB Layout Example (Top View)
I
IN
A
PWM input
PWM
BOOT
V
IN
PGND
V
SWH
FDMF8705
CGND
C
BOOT
I
OUT
A
L
VOUT
V V
O
DISB
DISB
VIN
I
CIN
A
V
CIN
VCIN
C
VCIN
C
VIN
IC Ground
Power Ground
C
OUT
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