參數(shù)資料
型號(hào)： FDG6332C
廠商： FAIRCHILD SEMICONDUCTOR CORP
元件分類： 小信號(hào)晶體管
英文描述： Tantalum Molded Capacitor; Capacitance: 220uF; Voltage: 6.3V; Packaging: Tape & Reel
中文描述： 700 mA, 20 V, 2 CHANNEL, N AND P-CHANNEL, Si, SMALL SIGNAL, MOSFET
封裝： SC-70, 6 PIN
文件頁數(shù)： 2/8頁
文件大小： 93K
代理商： FDG6332C
FDG6332C Rev C2 (W)
Electrical Characteristics
Symbol
T
A
= 25°C unless otherwise noted
Test Conditions
Parameter
Min
Typ
Max
Units
Off Characteristics
BV
DSS
Drain–Source Breakdown Voltage
V
GS
= 0 V,
V
GS
= 0 V,
I
D
= 250
μ
A,Ref. to 25
°
C
I
D
= –250
μ
A,Ref. to 25
°
C
V
DS
= 16 V,
V
DS
= –16 V,
V
GS
=
±
12 V, V
DS
= 0 V
V
GS
=
±
12V , V
DS
= 0 V
I
D
= 250
μ
A
I
D
= –250
μ
A
Q1
Q2
Q1
Q2
Q1
Q2
20
–20
V
BV
DSS
T
J
Breakdown Voltage Temperature
Coefficient
14
–14
mV/
°
C
I
DSS
Zero Gate Voltage Drain Current
V
GS
= 0 V
V
GS
= 0 V
1
–1
±
100
±
100
μ
A
I
GSSF
/I
GSSR
I
GSSF
/I
GSSR
On Characteristics
V
GS(th)
Gate Threshold Voltage
Gate–Body Leakage, Forward
Gate–Body Leakage, Reverse
nA
nA
(Note 2)
Q1
V
DS
= V
GS
, I
D
= 250
μ
A
V
DS
= V
GS
, I
D
= –250
μ
A
I
D
= 250
μ
A,Ref. To 25
°
C
I
D
= –250
μ
A,Ref. to 25
°
C
V
GS
= 4.5 V, I
D
=0.7 A
V
GS
= 2.5 V, I
D
=0.6 A
V
GS
= 4.5 V, I
D
=0.7A,T
J
=125
°
C
V
GS
= –4.5 V, I
D
= –0.6 A
V
GS
= –2.5 V, I
D
= –0.5 A
V
GS
=–4.5 V, I
D
=–0.6 A,T
J
=125
°
C
V
DS
= 5 V
I
D
= 0.7 A
V
DS
= –5 V
I
D
= –0.6A
V
GS
= 4.5 V, V
DS
= 5 V
V
GS
= –4.5 V, V
DS
= –5 V
0.6
1.1
1.5
Q2
Q1
Q2
Q1
-0.6
–1.2
–2.8
3
180
293
247
300
470
400
2.8
1.8
–1.5
V
V
GS(th)
T
J
R
DS(on)
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
mV/
°
C
300
400
442
420
630
700
Q2
m
g
FS
Q1
Q2
Q1
Q2
Forward Transconductance
S
I
D(on)
1
–2
On–State Drain Current
A
Dynamic Characteristics
C
iss
Input Capacitance
Q1
Q2
Q1
Q2
Q1
Q2
V
DS
=10 V, V
GS
= 0 V, f=1.0MHz
V
DS
=–10 V, V
GS
= 0 V, f=1.0MHz
V
DS
=10 V, V
GS
= 0 V, f=1.0MHz
V
DS
=–10 V, V
GS
= 0 V, f=1.0MHz
V
DS
=10 V, V
GS
= 0 V, f=1.0MHz
V
DS
=–10 V, V
GS
= 0 V, f=1.0MHz
113
114
34
24
16
9
pF
C
oss
Output Capacitance
pF
C
rss
Reverse Transfer Capacitance
pF
Switching Characteristics
t
d(on)
Turn–On Delay Time
(Note 2)
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
5
10
11
15
25
18
12
3
3.4
1.5
2
5.5
7
14
9
6
1.5
1.7
1.1
1.4
0.24
0.3
0.3
0.4
ns
t
r
Turn–On Rise Time
ns
t
d(off)
Turn–Off Delay Time
ns
t
f
Turn–Off Fall Time
For
Q1
:
V
DS
=10 V,
V
GS
= 4.5 V,
I
D
= 1 A
R
GEN
= 6
For
Q2
:
V
DS
=–10 V,
V
GS
= –4.5 V, R
GEN
= 6
I
D
= –1 A
ns
Q
g
Total Gate Charge
nC
Q
gs
Gate–Source Charge
nC
Q
gd
Gate–Drain Charge
For
Q1
:
V
DS
=10 V,
V
GS
= 4.5 V,
For
Q2
:
V
DS
=–10 V, I
D
= –0.6 A
V
GS
= –4.5 V, R
GEN
= 6
I
D
= 0.7 A
R
GEN
= 6
nC
F
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