參數(shù)資料
型號： FDD4243
廠商： FAIRCHILD SEMICONDUCTOR CORP
元件分類： JFETs
英文描述： 40V P-Channel PowerTrench MOSFET -40V, -14A, 44mohm
中文描述： 6.7 A, 40 V, 0.064 ohm, P-CHANNEL, Si, POWER, MOSFET, TO-252
封裝： ROHS COMPLIANT, DPAK, 3 PIN
文件頁數(shù)： 2/6頁
文件大小： 383K
代理商： FDD4243
F
M
FDD4243 Rev.C
www.fairchildsemi.com
2
Electrical Characteristics
T
J
= 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BV
DSS
BV
DSS
T
J
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
I
D
=
-
250
μ
A, V
GS
= 0V
-
40
V
I
D
= -250
μ
A, referenced to 25°C
-32
mV/°
C
I
DSS
Zero Gate Voltage Drain Current
V
DS
=
-
32V,
V
GS
= 0V
V
GS
= ±20V, V
GS
= 0V
-
1
μ
A
T
J
= 125°C
-100
±100
I
GSS
Gate to Source Leakage Current
nA
On Characteristics
V
GS(th)
V
GS(th)
T
J
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
V
GS
= V
DS
, I
D
=
-
250
μ
A
-
1
-
1.6
-
3
V
I
D
= -250
μ
A, referenced to 25°C
4.7
mV/°C
r
DS(on)
Drain to Source On Resistance
V
GS
=
-
10V, I
D
=
-
6.7A
V
GS
=
-
4.5V, I
D
=
-
5.5A
V
GS
=
-
10V, I
D
=
-
6.7A, T
J
= 125°C
V
DS
=
-
5V, I
D
=
-
6.7A
36
48
53
16
44
64
69
m
g
FS
Forward Transconductance
S
Dynamic Characteristics
C
iss
C
oss
C
rss
R
g
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
V
DS
= -20V, V
GS
= 0V,
f = 1MHz
1165
165
90
4
1550
220
135
pF
pF
pF
f = 1MHz
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Q
g(TOT)
Q
gs
Q
gd
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge at 10V
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
V
DD
=
-
20V, I
D
=
-
6.7A
V
GS
=
-
10V, R
GEN
= 6
6
12
26
35
14
29
ns
ns
ns
ns
nC
nC
nC
15
22
7
21
3.4
4
V
DD
=
-
20V, I
D
=
-
6.7A
V
GS
=
-
10V
Drain-Source Diode Characteristics
V
SD
t
rr
Q
rr
Source to Drain Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
V
GS
= 0V, I
S
=
-
6.7A (Note 2)
0.86
29
30
1.2
43
44
V
ns
nC
I
F
=
-
6.7A, di/dt = 100A/
μ
s
Notes:
1:
R
is sum of junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R
θ
JC
is
guaranteed by design while R
θ
JC
is determined by the user’s board design.
2:
Pulse Test: Pulse Width < 30
0
μ
s, Duty cycle < 2.0%.
3:
Starting T
J
= 25
°C, L = 3mH, I
AS
= 7.5A, V
DD
= 40V, V
GS
= 10V.
a. 40°C/W when mounted on a 1 in
2
pad of 2 oz copper
b. 96°C/W when mounted on a minimum pad.
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