參數(shù)資料
型號(hào)： EVAL-ADF4351EB1Z
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 3/28頁(yè)
文件大?。?/td> 0K
描述： BOARD 1 EVAL FOR ADF4351
標(biāo)準(zhǔn)包裝： 1
系列： *
Data Sheet
ADF4351
Rev. 0 | Page 11 of 28
CIRCUIT DESCRIPTION
REFERENCE INPUT SECTION
The reference input stage is shown in Figure 16. The SW1 and
SW2 switches are normally closed. The SW3 switch is normally
open. When power-down is initiated, SW3 is closed, and SW1
and SW2 are opened. In this way, no loading of the REFIN pin
occurs during power-down.
BUFFER
TO R COUNTER
REFIN
100k
NC
SW2
SW3
NO
NC
SW1
POWER-DOWN
CONTROL
09800-
005
Figure 16. Reference Input Stage
RF N DIVIDER
The RF N divider allows a division ratio in the PLL feedback
path. The division ratio is determined by the INT, FRAC, and
MOD values, which build up this divider (see Figure 17).
THIRD-ORDER
FRACTIONAL
INTERPOLATOR
MOD
VALUE
FRAC
VALUE
INT
VALUE
RF N DIVIDER
N = INT + FRAC/MOD
FROM
VCO OUTPUT/
OUTPUT DIVIDERS
TO PFD
N COUNTER
09800-
006
Figure 17. RF N Divider
INT, FRAC, MOD, and R Counter Relationship
The INT, FRAC, and MOD values, in conjunction with the
R counter, make it possible to generate output frequencies that
are spaced by fractions of the PFD frequency. For more informa-
The RF VCO frequency (RFOUT) equation is
RFOUT = fPFD × (INT + (FRAC/MOD))
(1)
where:
RFOUT is the output frequency of the voltage controlled oscillator
(VCO).
INT is the preset divide ratio of the binary 16-bit counter (23 to
65,535 for the 4/5 prescaler; 75 to 65,535 for the 8/9 prescaler).
FRAC is the numerator of the fractional division (0 to MOD 1).
MOD is the preset fractional modulus (2 to 4095).
The PFD frequency (fPFD) equation is
fPFD = REFIN × [(1 + D)/(R × (1 + T))]
(2)
where:
REFIN is the reference input frequency.
D is the REFIN doubler bit (0 or 1).
R is the preset divide ratio of the binary 10-bit programmable
reference counter (1 to 1023).
T is the REFIN divide-by-2 bit (0 or 1).
Integer-N Mode
If FRAC = 0 and the DB8 (LDF) bit in Register 2 is set to 1, the
synthesizer operates in integer-N mode. The DB8 bit in Register 2
should be set to 1 for integer-N digital lock detect.
R Counter
The 10-bit R counter allows the input reference frequency
(REFIN) to be divided down to produce the reference clock
to the PFD. Division ratios from 1 to 1023 are allowed.
PHASE FREQUENCY DETECTOR (PFD) AND
CHARGE PUMP
The phase frequency detector (PFD) takes inputs from the
R counter and N counter and produces an output proportional
to the phase and frequency difference between them. Figure 18
is a simplified schematic of the phase frequency detector.
U3
CLR2
Q2
D2
U2
DOWN
UP
HIGH
CPOUT
–IN
+IN
CHARGE
PUMP
DELAY
CLR1
Q1
D1
U1
09800-
007
Figure 18. PFD Simplified Schematic
The PFD includes a programmable delay element that sets the
width of the antibacklash pulse (ABP). This pulse ensures that
there is no dead zone in the PFD transfer function. Bit DB22 in
Register 3 (R3) is used to set the ABP as follows:
When Bit DB22 is set to 0, the ABP width is programmed to
6 ns, the recommended value for fractional-N applications.
When Bit DB22 is set to 1, the ABP width is programmed to
3 ns, the recommended value for integer-N applications.
For integer-N applications, the in-band phase noise is improved
by enabling the shorter pulse width. The PFD frequency can
operate up to 90 MHz in this mode. To operate with PFD
frequencies higher than 45 MHz, VCO band select must be dis-
abled by setting the phase adjust bit (DB28) to 1 in Register 1.
相關(guān)PDF資料
PDF描述
GEM25DRYF CONN EDGECARD 50POS DIP .156 SLD
GEM28DRTF CONN EDGECARD 56POS DIP .156 SLD
H3AWH-4006G IDC CABLE - HSC40H/AE40G/HPL40H
GEM28DRKF CONN EDGECARD 56POS DIP .156 SLD
M1CXA-5036J IDC CABLE - MKC50A/MC50G/X
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EVAL-ADF4360-0EB1 制造商:AD 制造商全稱(chēng):Analog Devices 功能描述:Integrated Synthesizer and VCO
EVAL-ADF4360-1EB1 制造商:Analog Devices 功能描述:Evaluation Board For ADF4360-1
EVAL-ADF4360-1EBZ1 功能描述:BOARD EVALUATION FOR ADF4360-1 RoHS:是 類(lèi)別:編程器，開(kāi)發(fā)系統(tǒng) >> 評(píng)估演示板和套件 系列:- 產(chǎn)品培訓(xùn)模塊:Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- 主要目的:電源管理，電池充電器 嵌入式:否 已用 IC / 零件:MAX8903A 主要屬性:1 芯鋰離子電池 次要屬性:狀態(tài) LED 已供物品:板
EVAL-ADF4360-2EB1 制造商:Analog Devices 功能描述:EVALUATION BOARD FOR ADF4360-2
EVAL-ADF4360-2EBZ1 功能描述:BOARD EVALUATION FOR ADF4360-2 RoHS:是 類(lèi)別:編程器，開(kāi)發(fā)系統(tǒng) >> 評(píng)估演示板和套件 系列:- 標(biāo)準(zhǔn)包裝:1 系列:PSoC® 主要目的:電源管理，熱管理 嵌入式:- 已用 IC / 零件:- 主要屬性:- 次要屬性:- 已供物品:板，CD，電源
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*