參數(shù)資料
型號(hào): EFM32G842F128
廠商: Energy Micro
文件頁數(shù): 81/136頁
文件大?。?/td> 0K
描述: IC MCU 32BIT 128KB FLASH 64LQFP
標(biāo)準(zhǔn)包裝: 1
系列: Gecko
核心處理器: ARM? Cortex?-M3
芯體尺寸: 32-位
速度: 32MHz
連通性: I²C,IrDA,智能卡,SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,DMA,LCD,POR,PWM,WDT
輸入/輸出數(shù): 53
程序存儲(chǔ)器容量: 128KB(128K x 8)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 16K x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 3.8 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x12b,D/A 2x12b
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 64-TQFP
包裝: 標(biāo)準(zhǔn)包裝
其它名稱: 914-1028-6
...the world's most energy friendly microcontrollers
2011-02-04 - d0002_Rev1.00
49
www.energymicro.com
3.4.3.1 Syntax
op{type}{cond} Rt, [Rn, Rm {, LSL #n}]
where:
op
is one of:
LDR
Load Register.
STR
Store Register.
type
is one of:
B
unsigned byte, zero extend to 32 bits on loads.
SB
signed byte, sign extend to 32 bits (LDR only).
H
unsigned halfword, zero extend to 32 bits on loads.
SH
signed halfword, sign extend to 32 bits (LDR only).
#
omit, for word.
cond
is an optional condition code, see Section 3.3.7 (p. 43) .
Rt
is the register to load or store.
Rn
is the register on which the memory address is based.
Rm
is a register containing a value to be used as the offset.
LSL #n
is an optional shift, with n in the range 0 to 3.
3.4.3.2 Operation
LDR
instructions load a register with a value from memory.
STR
instructions store a register value into memory.
The memory address to load from or store to is at an offset from the register Rn. The offset is specified
by the register Rm and can be shifted left by up to 3 bits using LSL.
The value to load or store can be a byte, halfword, or word. For load instructions, bytes and halfwords
can either be signed or unsigned. See Section 3.3.5 (p. 42) .
3.4.3.3 Restrictions
In these instructions:
Rn must not be PC
Rm must not be SP and must not be PC
Rt can be SP only for word loads and word stores
Rt can be PC only for word loads.
When Rt is PC in a word load instruction:
bit[0] of the loaded value must be 1 for correct execution, and a branch occurs to this halfword-aligned
address
if the instruction is conditional, it must be the last instruction in the IT block.
3.4.3.4 Condition flags
These instructions do not change the flags.
3.4.3.5 Examples
STR
R0, [R5, R1]
; Store value of R0 into an address equal to
; sum of R5 and R1
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EFM32G842F128G-E-QFP64 功能描述:128K FLASH, 16K RAM, 4X22 LCD, A 制造商:silicon labs 系列:Gecko 包裝:托盤 零件狀態(tài):在售 核心處理器:ARM? Cortex?-M3 核心尺寸:32-位 速度:32MHz 連接性:I2C,IrDA,智能卡,SPI,UART/USART 外設(shè):欠壓檢測/復(fù)位,DMA,LCD,POR,PWM,WDT I/O 數(shù):53 程序存儲(chǔ)容量:128KB(128K x 8) 程序存儲(chǔ)器類型:閃存 EEPROM 容量:- RAM 容量:16K x 8 電壓 - 電源(Vcc/Vdd):1.98 V ~ 3.8 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 8x12b,D/A 2x12b 振蕩器類型:內(nèi)部 工作溫度:-40°C ~ 85°C(TA) 封裝/外殼:64-TQFP 供應(yīng)商器件封裝:64-TQFP(10x10) 標(biāo)準(zhǔn)包裝:160
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