參數(shù)資料
型號: EFM32G842F128
廠商: Energy Micro
文件頁數(shù): 115/136頁
文件大?。?/td> 0K
描述: IC MCU 32BIT 128KB FLASH 64LQFP
標(biāo)準(zhǔn)包裝: 1
系列: Gecko
核心處理器: ARM? Cortex?-M3
芯體尺寸: 32-位
速度: 32MHz
連通性: I²C,IrDA,智能卡,SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,DMA,LCD,POR,PWM,WDT
輸入/輸出數(shù): 53
程序存儲器容量: 128KB(128K x 8)
程序存儲器類型: 閃存
RAM 容量: 16K x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 3.8 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x12b,D/A 2x12b
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 64-TQFP
包裝: 標(biāo)準(zhǔn)包裝
其它名稱: 914-1028-6
...the world's most energy friendly microcontrollers
2011-02-04 - d0002_Rev1.00
8
www.energymicro.com
Name
Type
1
Required
privilege
2
Reset value
Description
PRIMASK
RW
Privileged
0x00000000
FAULTMASK
RW
Privileged
0x00000000
BASEPRI
RW
Privileged
0x00000000
CONTROL
RW
Privileged
0x00000000
1Describes access type during program execution in thread mode and Handler mode. Debug access can differ.
2An entry of Either means privileged and unprivileged software can access the register.
2.1.3.1 General-purpose registers
R0-R12 are 32-bit general-purpose registers for data operations.
2.1.3.2 Stack Pointer
The Stack Pointer (SP) is register R13. In Thread mode, bit[1] of the CONTROL register indicates the
stack pointer to use:
0 = Main Stack Pointer (MSP). This is the reset value.
1 = Process Stack Pointer (PSP).
On reset, the processor loads the MSP with the value from address 0x00000000.
2.1.3.3 Link Register
The Link Register (LR) is register R14. It stores the return information for subroutines, function calls,
and exceptions. On reset, the processor loads the LR value 0xFFFFFFFF.
2.1.3.4 Program Counter
The Program Counter (PC) is register R15. It contains the current program address. Bit[0] is always 0
because instruction fetches must be halfword aligned. On reset, the processor loads the PC with the
value of the reset vector, which is at address 0x00000004.
2.1.3.5 Program Status Register
The Program Status Register (PSR) combines:
Application Program Status Register (APSR)
Interrupt Program Status Register (IPSR)
Execution Program Status Register (EPSR).
These registers are mutually exclusive bitfields in the 32-bit PSR. The bit assignments are:
25 24 23
Reserved
ISR_NUMBER
31 30 29 28 27
N Z C V
0
Reserved
APSR
IPSR
EPSR
Reserved
26
16 15
10 9
Reserved
ICI/IT
T
Q
8
The PSR bit assignments are:
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