參數(shù)資料
型號: EFM32G842F128
廠商: Energy Micro
文件頁數(shù): 112/136頁
文件大?。?/td> 0K
描述: IC MCU 32BIT 128KB FLASH 64LQFP
標(biāo)準(zhǔn)包裝: 1
系列: Gecko
核心處理器: ARM? Cortex?-M3
芯體尺寸: 32-位
速度: 32MHz
連通性: I²C,IrDA,智能卡,SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,DMA,LCD,POR,PWM,WDT
輸入/輸出數(shù): 53
程序存儲器容量: 128KB(128K x 8)
程序存儲器類型: 閃存
RAM 容量: 16K x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 3.8 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x12b,D/A 2x12b
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 64-TQFP
包裝: 標(biāo)準(zhǔn)包裝
其它名稱: 914-1028-6
...the world's most energy friendly microcontrollers
2011-02-04 - d0002_Rev1.00
77
www.energymicro.com
3.9.3.2 Operation
The IT instruction makes up to four following instructions conditional. The conditions can be all the
same, or some of them can be the logical inverse of the others. The conditional instructions following
the IT instruction form the IT block.
The instructions in the IT block, including any branches, must specify the condition in the {cond} part
of their syntax.
Note
Your assembler might be able to generate the required IT instructions for conditional
instructions automatically, so that you do not need to write them yourself. See your
assembler documentation for details.
A BKPT instruction in an IT block is always executed, even if its condition fails.
Exceptions can be taken between an IT instruction and the corresponding IT block, or within an IT block.
Such an exception results in entry to the appropriate exception handler, with suitable return information
in LR and stacked PSR.
Instructions designed for use for exception returns can be used as normal to return from the exception,
and execution of the IT block resumes correctly. This is the only way that a PC#modifying instruction is
permitted to branch to an instruction in an IT block.
3.9.3.3 Restrictions
The following instructions are not permitted in an IT block:
IT
CBZ and CBNZ
CPSID and CPSIE.
Other restrictions when using an IT block are:
a branch or any instruction that modifies the PC must either be outside an IT block or must be the
last instruction inside the IT block. These are:
ADD PC, PC, Rm
MOV PC, Rm
B, BL, BX, BLX
any LDM, LDR, or POP instruction that writes to the PC
TBB and TBH
do not branch to any instruction inside an IT block, except when returning from an exception handler
all conditional instructions except Bcond must be inside an IT block. Bcond can be either outside or
inside an IT block but has a larger branch range if it is inside one
each instruction inside the IT block must specify a condition code suffix that is either the same or
logical inverse as for the other instructions in the block.
Note
Your assembler might place extra restrictions on the use of IT blocks, such as prohibiting
the use of assembler directives within them.
3.9.3.4 Condition flags
This instruction does not change the flags.
3.9.3.5 Example
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