參數(shù)資料
型號(hào): EFM32G842F128
廠商: Energy Micro
文件頁數(shù): 77/136頁
文件大?。?/td> 0K
描述: IC MCU 32BIT 128KB FLASH 64LQFP
標(biāo)準(zhǔn)包裝: 1
系列: Gecko
核心處理器: ARM? Cortex?-M3
芯體尺寸: 32-位
速度: 32MHz
連通性: I²C,IrDA,智能卡,SPI,UART/USART
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,DMA,LCD,POR,PWM,WDT
輸入/輸出數(shù): 53
程序存儲(chǔ)器容量: 128KB(128K x 8)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 16K x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 3.8 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x12b,D/A 2x12b
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 64-TQFP
包裝: 標(biāo)準(zhǔn)包裝
其它名稱: 914-1028-6
...the world's most energy friendly microcontrollers
2011-02-04 - d0002_Rev1.00
45
www.energymicro.com
Example 3.2 (p. 45) shows the use of conditional instructions to update the value of R4 if the signed
values R0 is greater than R1 and R2 is greater than R3.
Example 3.2. Compare and update value
CMP
R0, R1
; Compare R0 and R1, setting flags
ITT
GT
; IT instruction for the two GT conditions
CMPGT
R2, R3
; If 'greater than', compare R2 and R3, setting flags
MOVGT
R4, R5
; If still 'greater than', do R4 = R5
3.3.8 Instruction width selection
There are many instructions that can generate either a 16-bit encoding or a 32-bit encoding depending on
the operands and destination register specified. For some of these instructions, you can force a specific
instruction size by using an instruction width suffix. The .W suffix forces a 32-bit instruction encoding.
The .N suffix forces a 16-bit instruction encoding.
If you specify an instruction width suffix and the assembler cannot generate an instruction encoding of
the requested width, it generates an error.
Note
In some cases it might be necessary to specify the .W suffix, for example if the operand
is the label of an instruction or literal data, as in the case of branch instructions. This is
because the assembler might not automatically generate the right size encoding.
To use an instruction width suffix, place it immediately after the instruction mnemonic and condition
code, if any. Example 3.3 (p. 45) shows instructions with the instruction width suffix.
Example 3.3. Instruction width selection
BCS.W
label
; creates a 32-bit instruction even for a short branch
ADDS.W R0, R0, R1 ; creates a 32-bit instruction even though the same
; operation can be done by a 16-bit instruction
3.4 Memory access instructions
Table 3.5 (p. 45) shows the memory access instructions:
Table 3.5. Memory access instructions
Mnemonic
Brief description
See
ADR
Load PC-relative address
CLREX
Clear Exclusive
LDM{mode}
Load Multiple registers
LDR{type}
Load Register using immediate offset
LDR{type}
Load Register using register offset
LDR{type}T
Load Register with unprivileged access
LDR
Load Register using PC-relative address
LDREX{type}
Load Register Exclusive
POP
Pop registers from stack
PUSH
Push registers onto stack
STM{mode}
Store Multiple registers
STR{type}
Store Register using immediate offset
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EFM32G842F128G-E-QFP64 功能描述:128K FLASH, 16K RAM, 4X22 LCD, A 制造商:silicon labs 系列:Gecko 包裝:托盤 零件狀態(tài):在售 核心處理器:ARM? Cortex?-M3 核心尺寸:32-位 速度:32MHz 連接性:I2C,IrDA,智能卡,SPI,UART/USART 外設(shè):欠壓檢測(cè)/復(fù)位,DMA,LCD,POR,PWM,WDT I/O 數(shù):53 程序存儲(chǔ)容量:128KB(128K x 8) 程序存儲(chǔ)器類型:閃存 EEPROM 容量:- RAM 容量:16K x 8 電壓 - 電源(Vcc/Vdd):1.98 V ~ 3.8 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 8x12b,D/A 2x12b 振蕩器類型:內(nèi)部 工作溫度:-40°C ~ 85°C(TA) 封裝/外殼:64-TQFP 供應(yīng)商器件封裝:64-TQFP(10x10) 標(biāo)準(zhǔn)包裝:160
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