參數(shù)資料
型號: EFM32G842F128
廠商: Energy Micro
文件頁數(shù): 120/136頁
文件大?。?/td> 0K
描述: IC MCU 32BIT 128KB FLASH 64LQFP
標(biāo)準(zhǔn)包裝: 1
系列: Gecko
核心處理器: ARM? Cortex?-M3
芯體尺寸: 32-位
速度: 32MHz
連通性: I²C,IrDA,智能卡,SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,DMA,LCD,POR,PWM,WDT
輸入/輸出數(shù): 53
程序存儲器容量: 128KB(128K x 8)
程序存儲器類型: 閃存
RAM 容量: 16K x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 3.8 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x12b,D/A 2x12b
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 64-TQFP
包裝: 標(biāo)準(zhǔn)包裝
其它名稱: 914-1028-6
...the world's most energy friendly microcontrollers
2011-02-04 - d0002_Rev1.00
84
www.energymicro.com
Rn
is the source register.
spec_reg
can be any of: APSR, IPSR, EPSR, IEPSR, IAPSR, EAPSR, PSR, MSP, PSP, PRIMASK,
BASEPRI
, BASEPRI_MAX, FAULTMASK, or CONTROL.
3.10.7.2 Operation
The register access operation in MSR depends on the privilege level. Unprivileged software can only
access the APSR, see Table 2.4 (p. 9) . Privileged software can access all special registers.
In unprivileged software writes to unallocated or execution state bits in the PSR are ignored.
Note
When you write to BASEPRI_MAX, the instruction writes to BASEPRI only if either:
Rn is non-zero and the current BASEPRI value is 0
Rn is non-zero and less than the current BASEPRI value.
3.10.7.3 Restrictions
Rn
must not be SP and must not be PC.
3.10.7.4 Condition flags
This instruction updates the flags explicitly based on the value in Rn.
3.10.7.5 Examples
MSR
CONTROL, R1 ; Read R1 value and write it to the CONTROL register
3.10.8 NOP
No Operation.
3.10.8.1 Syntax
NOP{cond}
where:
cond
is an optional condition code, see Section 3.3.7 (p. 43) .
3.10.8.2 Operation
NOP
does nothing. NOP is not necessarily a time#consuming NOP. The processor might remove it from
the pipeline before it reaches the execution stage.
Use NOP for padding, for example to place the following instruction on a 64#bit boundary.
3.10.8.3 Condition flags
This instruction does not change the flags.
3.10.8.4 Examples
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