參數資料
型號: EDS5104ABTA-6B
廠商: ELPIDA MEMORY INC
元件分類: DRAM
英文描述: RP15 (F) Series - Powerline Regulated DC-DC Converters; Input Voltage (Vdc): 12V; Output Voltage (Vdc): 12V; 2:1 Wide Input Voltage Range; 15 Watts Output Power; 1.6kVDC Isolation; UL Certified; Fixed Operating Frequency; Six-Sided Continuous Shield; Standard 50.8 x25.4x10.2mm Package; Efficiency to 88%
中文描述: 128M X 4 SYNCHRONOUS DRAM, 5 ns, PDSO54
封裝: PLASTIC, TSOP2-54
文件頁數: 47/52頁
文件大?。?/td> 564K
代理商: EDS5104ABTA-6B
EDS5104ABTA, EDS5108ABTA, EDS5116ABTA
Preliminary Data Sheet E0250E10 (Ver. 1.0)
47
Self Refresh Cycle
CLK
CKE
/CS
/RAS
/CAS
/WE
BS
Address
DQM
DQ (input)
DQ (output)
Precharge command
Self refresh entry
Auto
Self refresh exit
CKE Low
A10=1
RC
t
RP
t
Self refresh cycle
/RAS-/CAS delay = 3
CL = 3
BL = 4
=
VIH or VIL
High-Z
Next
RC
t
Next
lSREX
Self refresh entry
Clock Suspend Mode
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
R:a
C:a
R:b
a
a+1 a+2
a+3
b
b+1 b+2
R:a
C:a R:b
C:b
a
a+1 a+2
b
b+1 b+2 b+3
C:b
Bank0
Active clock
Active clock
Bank0
Bank3
Reastart
Read suspend
Bank0
Bank3
Earliest Bank3
Bank0
Bank0
Active clock
Active clock
Bank3
Writstart
Write suspend
Bank3
Bank0
Earliest Bank3
b+3
CKE
/RAS
/CS
/CAS
/WE
Address
DQM
CLK
BS
CKE
/RAS
/CS
/CAS
/WE
BS
Address
DQM
a+3
High-Z
High-Z
tHI
tSI
tSI
Read cycle
/RAS-/CAS delay = 2
/CAS latency = 2
Burst length = 4
= VIH or VIL
Write cycle
/RAS-/CAS delay = 2
/CAS latency = 2
Burst length = 4
= VIH or VIL
DQ (output)
DQ (input)
DQ (output)
DQ (input)
相關PDF資料
PDF描述
EDS5108ABTA-6B 512M bits SDRAM
EDS5104ABTA-75 512M bits SDRAM
EDS5108ABTA-75 512M bits SDRAM
EDS5104ABTA-7A 512M bits SDRAM
EDS5108ABTA-7A 512M bits SDRAM
相關代理商/技術參數
參數描述
EDS5104ABTA-75 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512M bits SDRAM
EDS5104ABTA-7A 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512M bits SDRAM
EDS5108ABTA 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512M bits SDRAM
EDS5108ABTA-6B 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512M bits SDRAM
EDS5108ABTA-75 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512M bits SDRAM