參數(shù)資料
型號: EDS2532CABH-1A-E
廠商: ELPIDA MEMORY INC
元件分類: DRAM
英文描述: GT 25C 25#12 PIN PLUG
中文描述: 8M X 32 SYNCHRONOUS DRAM, 6 ns, PBGA90
封裝: LEAD FREE, FBGA-90
文件頁數(shù): 16/48頁
文件大?。?/td> 578K
代理商: EDS2532CABH-1A-E
EDS2532CABH
Data Sheet E0395E40 (Ver. 4.0)
16
Current state
/CS
/RAS
/CAS
/WE
Address
Command
Operation
Mode register set
H
×
×
×
×
DESL
NOP
L
H
H
H
×
NOP
NOP
L
H
H
L
×
BST
ILLEGAL
L
H
L
H
BA, CA, A10
READ/READA
ILLEGAL*
4
L
H
L
L
BA, CA, A10
WRIT/WRITA
ILLEGAL*
4
L
L
H
H
BA, RA
ACT
Bank and row active*
9
L
L
H
L
BA, A10
PRE, PALL
NOP
L
L
L
H
×
REF, SELF
Refresh*
9
Remark: H: VIH. L: VIL.
×
: VIH or VIL
Notes: 1. An interval of tDPL is required between the final valid data input and the precharge command.
2. If tRRD is not satisfied, this operation is illegal.
3. Illegal for same bank, except for another bank.
4. Illegal for all banks.
5. NOP for same bank, except for another bank.
6. Illegal if tRCD is not satisfied.
7. Illegal if tRAS is not satisfied.
8. MRS command must be issued after DOUT finished, in case of DOUT remaining.
9. Illegal if
l
MRD is not satisfied.
L
L
L
L
MODE
MRS
Mode register set*
8
相關PDF資料
PDF描述
EDS2532CABH-1AL-E GT 5C 3#4 2#16 PIN PLUG
EDS2532AABH-75 71-580584-09S
EDS2532AABH-75-E GT 3C 3#0 PIN PLUG
EDS2532CABH-75-E GT 3C 3#0 SKT PLUG
EDS2532AABH-75L-E GT 47C 7#12 40#16 SKT PLUG
相關代理商/技術參數(shù)
參數(shù)描述
EDS2532CABH-1AL-E 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:256M bits SDRAM (8M words x 32 bits)
EDS2532CABH-75-E 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:256M bits SDRAM (8M words x 32 bits)
EDS2532CABH-75L-E 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:256M bits SDRAM (8M words x 32 bits)
EDS2532CABJ 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:256M bits SDRAM
EDS2532CABJ-1A-E 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:256M bits SDRAM