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參數(shù)資料
| 型號(hào)： | EDI9LC644V |
| 英文描述： | 128Kx32 SSRAM/1Mx32 SDRAM Array(3.3V,128x32同步靜態(tài)RAM和1Mx32同步動(dòng)態(tài)RAM陣列) |
| 中文描述： | 128Kx32 SSRAM/1Mx32內(nèi)存陣列（3.3伏，128x32同步靜態(tài)內(nèi)存和1Mx32同步動(dòng)態(tài)內(nèi)存陣列） |
| 文件頁數(shù)： | 4/26頁 |
| 文件大?。?/td> | 460K |
| 代理商： | EDI9LC644V |
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White Electronic Designs Corporation (508) 366-5151 www.whiteedc.com
EDI9LC644V
EDI9LC644AV
NOTES:
1. Both Banks must be idle otherwise it is an illegal action.
2. The Current State refers only refers to one of the banks, if BA selects this bank then the action is illegal. If BA selects the bank not being referenced by the Current
State then the action may be legal depending on the state of that bank.
3. The minimum and maximum Active time (tRAS) must be satisfied.
4. The RAS to CAS Delay (tRCD) must occur before the command is given.
5. Address SDA10 is used to determine if the Auto Precharge function is activated.
6. The command must satisfy any bus contention, bus turn around, and/or write recovery requirements.
The command is illegal if the minimum bank to bank delay time (tRRD) is not satisfied.
L
OP Code
Mode Register Set
ILLEGAL
L
H
X
Auto or Self Refresh
ILLEGAL
L
H
L
X
Precharge
ILLEGAL
L
H
BA
Row Address
Bank Activate
ILLEGAL
Refreshing
L
H
L
BA
Column
Write
ILLEGAL
L
H
L
H
BA
Column
Read
ILLEGAL
L
H
L
X
Burst Termination
No Operation; Idle after tRC
L
H
X
No Operation
No Operation; Idle after tRC
H
X
Device Deselect
No Operation; Idle after tRC
L
OP Code
Mode Register Set
ILLEGAL
L
H
X
Auto or Self Refresh
ILLEGAL
L
H
L
X
Precharge
ILLEGAL
Mode Register
L
H
BA
Row Address
Bank Activate
ILLEGAL
Accessing
L
H
L
BA
Column
Write
ILLEGAL
L
H
L
H
BA
Column
Read
ILLEGAL
L
H
L
X
Burst Termination
ILLEGAL
L
H
X
No Operation
No Operation; Idle after two clock cycles
H
X
Device Deselect
No Operation; Idle after two clock cycles
Current State
Command
Action
Notes
SDCE
SDRAS
SDCAS
SDWE
(BA)
SDA10-A0
Description
SDRAM CURRENT STATE TRUTH TABLE (cont.)
A11
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EDI9LC644V1310BC | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:128Kx32 SSRAM/1Mx32 SDRAM |
| EDI9LC644V1312BC | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:128Kx32 SSRAM/1Mx32 SDRAM |
| EDI9LC644V1510BC | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:128Kx32 SSRAM/1Mx32 SDRAM |
| EDI9LC644V1512BC | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:128Kx32 SSRAM/1Mx32 SDRAM |
| EDI9LC644V1610BC | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:128Kx32 SSRAM/1Mx32 SDRAM |
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