參數(shù)資料
型號: EDD1216AATA-6B-E
廠商: ELPIDA MEMORY INC
元件分類: DRAM
英文描述: 128M bits DDR SDRAM (8M words x 16 bits)
中文描述: 8M X 16 DDR DRAM, 0.7 ns, PDSO66
封裝: ROHS COMPLIANT, PLASTIC, TSOP2-66
文件頁數(shù): 22/49頁
文件大小: 569K
代理商: EDD1216AATA-6B-E
EDD1216AATA
Data Sheet E0444E40 (Ver. 4.0)
22
A0
0
1
DLL Enable
DLL Disable
DLL Control
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
0
0
0
0
0
0
0
0
0
DS
DLL
0
A11 A10
BA1
0
BA0
1
EMRS
A1
0
1
Normal
Weak
Driver Strength
Extended Mode Register Set [EMRS] (BA0 = 1, BA1 = 0)
Burst Operation
The burst type (BT) and the first three bits of the column address determine the order of a data out.
A2
A1
A0
Addressing(decimal)
Sequence
0, 1, 2, 3, 4, 5, 6, 7,
1, 2, 3, 4, 5, 6, 7,
2, 3, 4, 5, 6, 7,
3, 4, 5, 6, 7,
4, 5, 6, 7,
5, 6, 7,
6, 7,
7,
0, 1, 2, 3, 4, 5, 6,
0
0
0
0
1
1
0
0
1
1
0
0
0
1
0
1
0
1
1
1
1
Interleave
0, 1, 2, 3, 4, 5, 6, 7,
1, 0, 3, 2, 5, 4, 7,
2, 3, 0, 1, 6, 7,
3, 2, 1, 0, 7,
4, 5, 6, 7,
5, 4, 7,
6, 7,
7,
6, 5, 4, 3, 2, 1, 0,
1
1
0
Starting Ad.
0,
0, 1,
0, 1, 2,
0, 1, 2, 3,
0, 1, 2, 3, 4,
0, 1, 2, 3, 4, 5,
6,
4, 5,
6, 5, 4,
0, 1, 2, 3,
6, 1, 0, 3, 2,
4, 5, 2, 3, 0, 1,
Burst length = 8
A1
A0
Addressing(decimal)
Sequence
0, 1, 2, 3,
1, 2, 3, 0,
2, 3, 0, 1,
3, 0, 1, 2,
0
0
1
1
0
1
0
1
Interleave
0, 1, 2, 3,
1, 0, 3, 2,
2, 3, 0, 1,
3, 2, 1, 0,
Starting Ad.
Burst length = 4
A0
Addressing(decimal)
Sequence
0, 1,
1, 0,
0
1
Interleave
0, 1,
1, 0,
Starting Ad.
Burst length = 2
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