參數(shù)資料
型號(hào)： DSP56F827FG80E
廠商： Freescale Semiconductor
文件頁(yè)數(shù)： 7/60頁(yè)
文件大?。?/td> 0K
描述： IC HYBRID CTRLR 16BIT 128-LQFP
標(biāo)準(zhǔn)包裝： 72
系列： 56F8xx
核心處理器： 56800
芯體尺寸： 16-位
速度： 80MHz
連通性： EBI/EMI，SCI，SPI，SSI
外圍設(shè)備： POR，PWM，WDT
輸入/輸出數(shù)： 64
程序存儲(chǔ)器容量： 136KB（68K x 16）
程序存儲(chǔ)器類(lèi)型： 閃存
RAM 容量： 5K x 16
電壓 - 電源 (Vcc/Vdd)： 2.25 V ~ 2.75 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 10x12b
振蕩器型： 外部
工作溫度： -40°C ~ 85°C
封裝/外殼： 128-LQFP
包裝： 托盤(pán)
Signals and Package Information
56F827 Technical Data, Rev. 12
Freescale Semiconductor
15
GPIOB0
124
Input/Output
Port B GPIO—These eight dedicated General Purpose I/O (GPIO) pins can
be individually programmed as input or output pins.
After reset, the default state is GPIO input.
GPIOB1
123
GPIOB2
122
GPIOB3
121
GPIOB4
120
GPIOB5
119
GPIOB6
118
GPIOB7
117
GPIOD0
98
Input/ Output
Port D GPIO—These eight dedicated GPIO pins can be individually
programmed as an input or output pins.
After reset, the default state is GPIO input.
GPIOD1
97
GPIOD2
96
GPIOD3
95
GPIOD4
94
GPIOD5
93
GPIOD6
92
GPIOD7
91
SRD
(GPIOC0)
55
Input/Output
SSI Receive Data (SRD)—This input pin receives serial data and transfers the
data to the SSI Receive Shift Receiver.
Port C GPIO—This is a General Purpose I/O (GPIO) pin with the capability of
being individually programmed as input or output.
After reset, the default state is GPIO input.
SRFS
(GPIOC1)
54
Input/Output
SSI Serial Receive Frame Sync (SRFS)—This bidirectional pin is used by the
receive section of the SSI as frame sync I/O or flag I/O. The STFS can be
used only by the receiver. It is used to synchronize data transfer and can be an
input or an output.
Port C GPIO—This is a General Purpose I/O (GPIO) pin with the capability of
being individually programmed as input or output.
After reset, the default state is GPIO input.
SRCK
(GPIOC2)
53
Input/Output
SSI Serial Receive Clock (SRCK)—This bidirectional pin provides the serial
bit rate clock for the Receive section of the SSI. The clock signal can be
continuous or gated and can be used by both the transmitter and receiver in
synchronous mode.
Port C GPIO—This is a General Purpose I/O (GPIO) pin with the capability of
being individually programmed as input or output.
After reset, the default state is GPIO input.
Table 2-2 56F827 Signal and Package Information for the 128 Pin LQFP (Continued)
Signal Name
Pin No.
Type
Description
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DSP56F827FG80E 制造商:Freescale Semiconductor 功能描述:Digital Signal Processor IC DSP Type:Cor
DSP56F827FG80E 制造商:Freescale Semiconductor 功能描述:DSP LQFP128 3.6V
DSP56F827PB 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:56F827 16-Bit Hybrid Controller Product Brief
DSP56F827PB/D 制造商:MOTOROLA 制造商全稱(chēng):Motorola, Inc 功能描述:56F827 16-bit Hybrid Controller
DSP56F8XXBLUM 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:56F8xx Serial Bootloader User Manual
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