參數(shù)資料
型號： DS1865T+T&R
廠商： Maxim Integrated Products
文件頁數(shù)： 35/67頁
文件大?。?/td> 0K
描述： IC PON CONTROL TRI 28-TQFN
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 2,500
系列： *
類型： *
應(yīng)用： *
安裝類型： 表面貼裝
封裝/外殼： 28-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝： 28-TQFN-EP（5x5）
包裝： 帶卷 (TR)
DS1865
PON Triplexer Control and
Monitoring Circuit
40
____________________________________________________________________
Lower Memory, Register 78h: DOUT
POWER-ON VALUE
Recalled from Table 02h, Register C0h
READ ACCESS
All
WRITE ACCESS
All
MEMORY TYPE:
Volatile
78h
RESERVED
D3 OUT
D2 OUT
D1 OUT
D0 OUT
bit7
bit0
At power-on, these bits are defined by the value stored in the DPU byte (Table 02h, Register C0h).
These bits define the value of the logic states of their corresponding output pins.
Lower Memory, Register 79h: DIN
POWER-ON VALUE
See description
READ ACCESS
All
WRITE ACCESS
N/A
MEMORY TYPE:
Volatile
79h
RESERVED
INV LOSI
MUX LOSI
D3 IN
D2 IN
D1 IN
D0 IN
bit7
bit0
bit7:6
RESERVED
bit5
INV LOSI: Allows for inversion of LOSI pin to D0 pin. MUX LOSI bit must be set to 1 or this bit does
not affect the output. This bit is controlled (or set) by the DPU byte (Table 02h, Register C0h).
1 = LOS buffered OUT0 is inverted.
bit4
MUX LOSI: Determines control of D0 pin. This bit is controlled (or set) by the DPU byte (Table 02h,
Register C0h).
0 = Logic value of D0 is controlled by DOUT byte.
1 = Logic value of D0 is controlled by LOSI pin and INV LOSI bit.
bit3
D3 IN: Reflects the logic value of D3 pin.
bit2
D2 IN: Reflects the logic value of D2 pin.
bit1
D1 IN: Reflects the logic value of D1 pin.
bit0
D0 IN: Reflects the logic value of D0 pin.
Lower Memory, Register 7Ah: Reserved
POWER-ON VALUE
00h
READ ACCESS
All
WRITE ACCESS
N/A
MEMORY TYPE:
7Ah
00
000
bit7
bit0
This register is reserved. The value when read is 00h.
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