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參數(shù)資料
| 型號： | DM9102DE |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | SINGLE CHIP FAST ETHEMET NIC CONTROLLER |
| 中文描述： | 單晶片快速以太網(wǎng)NIC控制器 |
| 文件頁數(shù)： | 54/70頁 |
| 文件大小： | 2245K |
| 代理商： | DM9102DE |
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54
Preliminary datasheet
Version: DM9102D-DS-P02
Jan. 14, 2005
7.7 EEPROM Overview
The first 13 words of Configuration EEPROM are loaded
into the DM9102D after power-on-reset for the settings of
The format of EEPROM
the power management, system ID and Ethernet address.
The format of the EEPROM is as followed
7.7.4 Word Offset (04):
New_ Capabilities_
7.7.1 Subsystem ID Block
Every card has a Subsystem ID to indicate the information
of system vendor. The content will be transferred into the
PCI configuration space 2CH.
7.7.2Vendor ID
Vendor ID & Device ID can be set in EEPROM content &
auto-loaded to PCI configuration register after reset.(default
value = 1282H, 9102H) This function must be selectable for
enable by Auto_ Load_ Control (word offset 04 bit[3:0] of
EEPROM).
7.7.3 Word Offset (04): Auto_ Load_ Control
0
3
4
7
Bit3~0: “1010” to enable auto-load of PCI Vendor_ ID &
Device_ ID.
Bit7~4: “1X1X” to enable auto-load of NCE, PME & PMC &
PMCSR to PCI configuration space. Bit 4 and 6 are used to
control the polarity and pulse mode of the WOL pin.
If bit4 = 0, WOL is Active HIGH.
If bit4=1, WOL is Active LOW
If bit6 = 0, WOL is PULSE signal
If bit6=1, WOL is LEVEL signal.
Enable
Bit0: Directly mapping to bit20 (New Capabilities) of the
PCICS
If Bit9=1, Bit [12:10] mapping to bit [18:16] of the PCIPMR
and Bit [15:13] mapping to bit [24:22] of the PCIPMR.
7.7.5 Word Offset (07): PMC
0
7
3 2
Bit7~3: Directly mapping to bit[31:27] of the PCIPMR.
Bit2~0: Directly mapping to bit[21,26:25] of the PCIPMR.
7.7.6 Word Offset (07): Control
Bit 15: Disable PHY auto-MDIX function
Bit 14: Disable to power-down PHY if ISOLATE pin is low.
Bit 13: Clear PMCSR[1:0] if RST# pin is low
Bit 12: PME# is not pulse mode
Bit 11: Set to disable the output of WOL pin.
Bit 10: Set to disable the output of PME# pin.
Bit 9: Set to enable the link change wake up event.
Bit 8: Set to enable the Magic packet wake up event.
Field Name
Word Offset
0
1
2
4
5
6
7
8
10
Word Size
1
1
2
1
1
1
1
2
3
Subsystem Vendor ID
Subsystem ID
Reserved
NCE and Auto_ load_ control
PCI Vendor ID
PCI Device ID
PMCSR and PMC
Reserved
Ethernet Address
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| DM9102AF | Single Chip Fast Ethernet NIC controller |
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| DM9108APPLICATIONENGINEERINGNOTESONE | DM9108 Application Engineering notes one |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DM9102DEP | 制造商:DAVICOM 功能描述:IC ENET CNTRL 10/100M PHY 1 制造商:DAVICOM 功能描述:IC ENET CNTRL 10/100M PHY 128LQFP 制造商:DAVICOM 功能描述:IC, ENET CNTRL, 10/100M PHY, 128LQFP 制造商:DAVICOM 功能描述:IC, ENET CNTRL, 10/100M PHY, 128LQFP; Data Rate:100Mbps; Ethernet Type:IEEE 802.3u; Supply Voltage Min:2.375V; Supply Voltage Max:2.625V; Digital IC Case Style:LQFP; No. of Pins:128; Interface Type:PCI; Operating Temperature Min:0C;;RoHS Compliant: Yes |
| DM9102H | 制造商:DAVICOM 制造商全稱:DAVICOM 功能描述:Single Chip Fast Ethernet NIC Controller |
| DM9102HEP | 制造商:DAVICOM 制造商全稱:DAVICOM 功能描述:Single Chip Fast Ethernet NIC Controller |
| DM9103 | 制造商:DAVICOM 制造商全稱:DAVICOM 功能描述:10/100 Mbps 3-port Ethernet Switch Controller with PCI Interface |
| DM9103EP | 制造商:DAVICOM 制造商全稱:DAVICOM 功能描述:Three Port Ethernet Switch Controller with PCI Interface |
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