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參數(shù)資料
| 型號： | DM9102DE |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | SINGLE CHIP FAST ETHEMET NIC CONTROLLER |
| 中文描述： | 單晶片快速以太網(wǎng)NIC控制器 |
| 文件頁數(shù)： | 34/70頁 |
| 文件大?。?/td> | 2245K |
| 代理商： | DM9102DE |
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34
Preliminary datasheet
Version: DM9102D-DS-P02
Jan. 14, 2005
Bit
15
Name
100BASE-T4
Default
0,RO/P
Description
100BASE-T4 Capable:
1=DM9102D is able to perform in 100BASE-T4 mode.
0=DM9102D is not able to perform in 100BASE-T4 mode.
100BASE-TX FULL DUPLEX CAPABLE:
1= DM9102D is able to perform 100BASE-TX in Full Duplex mode.
0= DM9102D is not able to perform 100BASE-TX in Full Duplex mode.
100BASE-TX Half Duplex Capable:
1=DM9102D is able to perform 100BASE-TX in Half Duplex mode.
0=DM9102D is not able to perform 100BASE-TX in Half Duplex mode.
10BASE-T Full Duplex Capable:
1=DM9102D is able to perform 10BASE-T in Full Duplex mode.
0=DM9102D is not able to perform 10BASE-T in Full Duplex mode.
10BASE-T Half Duplex Capable:
1=DM9102D is able to perform 10BASE-T in Half Duplex mode.
0=DM9102D is not able to perform 10BASE-T in Half Duplex mode .
0000,RO Reserved:
Write as 0, ignore on read
1,RW
MII Frame Preamble Suppression:
1=PHY will accept management frames with preamble suppressed.
0=PHY will not accept management frames with preamble suppressed.
0,RO
Auto-negotiation Complete:
1=Auto-negotiation process is completed.
0=Auto-negotiation process is not completed.
0,RC/LH Remote Fault:
1= Remote fault condition detected (cleared on read or by a chip reset). Fault
criteria and detection method is DM9102D specific implementation. This bit
will set after the RF bit in the ANLPAR (bit 13, register address 05) is set
0= No remote fault condition detected
1,RO/P
Auto Configuration Ability:
1=DM9102D is able to perform Auto-negotiation
0=DM9102D is not able to perform Auto-negotiation
0,RC/LL
Link Status:
1=Valid link established (for either 10Mbps or 100Mbps operation)
0=Link not established
The link status bit is implemented with a latching function, so that the
occurrence of a link failure condition causes the Link Status bit to be cleared
and remain cleared until it is read via the management interface
0,RC/LH Jabber Detect:
1=Jabber condition detected
0=No jabber
This bit is implemented with a latching function. Jabber conditions will set this
bit unless it is cleared by a read to this register through a management
interface or a DM9102D reset. This bit works only in 10Mbps mode
1,RO/P
Extended Capability:
1=Extended register capability
0=Basic register capability only
14
100BASE-TX
Full Duplex
1,RO/P
13
100BASE-TX
Half Duplex
1,RO/P
12
10BASE-T
Full Duplex
1,RO/P
11
10BASE-T
Half Duplex
1,RO/P
10:7
Reserved
6
MF Preamble
Suppression
5
Auto-negotiation
Complete
4
Remote Fault
3
Auto-negotiation
Ability
2
Link Status
1
Jabber Detect
0
Extended
Capability
6.3.3 PHY Identifier Register #1 (PHYIDR1) – 2
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| DM9102 | Single Chip Fast Ethernet NIC controller |
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| DM9108APPLICATIONENGINEERINGNOTESONE | DM9108 Application Engineering notes one |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| DM9102DEP | 制造商:DAVICOM 功能描述:IC ENET CNTRL 10/100M PHY 1 制造商:DAVICOM 功能描述:IC ENET CNTRL 10/100M PHY 128LQFP 制造商:DAVICOM 功能描述:IC, ENET CNTRL, 10/100M PHY, 128LQFP 制造商:DAVICOM 功能描述:IC, ENET CNTRL, 10/100M PHY, 128LQFP; Data Rate:100Mbps; Ethernet Type:IEEE 802.3u; Supply Voltage Min:2.375V; Supply Voltage Max:2.625V; Digital IC Case Style:LQFP; No. of Pins:128; Interface Type:PCI; Operating Temperature Min:0C;;RoHS Compliant: Yes |
| DM9102H | 制造商:DAVICOM 制造商全稱:DAVICOM 功能描述:Single Chip Fast Ethernet NIC Controller |
| DM9102HEP | 制造商:DAVICOM 制造商全稱:DAVICOM 功能描述:Single Chip Fast Ethernet NIC Controller |
| DM9103 | 制造商:DAVICOM 制造商全稱:DAVICOM 功能描述:10/100 Mbps 3-port Ethernet Switch Controller with PCI Interface |
| DM9103EP | 制造商:DAVICOM 制造商全稱:DAVICOM 功能描述:Three Port Ethernet Switch Controller with PCI Interface |
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