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參數(shù)資料
| 型號： | DEM-VSP2232Y |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | CCD SIGNAL PROCESSOR FOR DIGITAL CAMERAS |
| 中文描述： | CCD信號處理器的數(shù)碼相機(jī) |
| 文件頁數(shù)： | 13/19頁 |
| 文件大?。?/td> | 248K |
| 代理商： | DEM-VSP2232Y |
VSP2232
SLAS320
–
MAY 2001
13
www.ti.com
electrical characteristics
,
all specifications at T
A
= 25
°
C, V
CC
= DRV
DD
= 3 V, conversion rate
(fADCCK) = 36 MHz, no load unless otherwise noted (continued)
programmable gain amplifier (PGA)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Gain control resolution
10
Bits
Maximum gain
Gain code = 1111111111
42
dB
High gain
Gain code = 1101001000
34
dB
Medium gain
Gain code = 1000100000
20
dB
Low gain
Gain code = 0010000000
0
dB
Minimum gain
Gain code = 0000000000
–
6
dB
Gain control error
±
0.5
dB
optical black clamp loop
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Control DAC resolution
10
Bits
Optical black clamp level
Programmable range of clamp level
2
242
LSB
OBCLP level at CODE = 1000
130
±
0.15
±
153
40.7
LSB
Minimum output current for control DAC
COB pin
Maximum output current for control DAC
μ
A
Loop time constant
C(COB) = 0.1
μ
F
C(COB) = 0.1
μ
F,
Output current from control DAC is saturated
μ
s
SR
Slew rate
1530
V/s
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